loadpatents
Patent applications and USPTO patent grants for Chan; Tsiu C..The latest application filed is for "method of forming planarized structures in an integrated circuit".
Patent | Date |
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Random access memory cell and method for fabricating same Grant 6,808,990 - Ferrant , et al. October 26, 2 | 2004-10-26 |
Radiation hardened semiconductor memory Grant 6,656,803 - Chan December 2, 2 | 2003-12-02 |
Method of forming planarized structures in an integrated circuit App 20030071306 - Huang, Kuei-Wu ;   et al. | 2003-04-17 |
Radiation hardened semiconductor memory App 20020086461 - Chan, Tsiu C. | 2002-07-04 |
Method of forming a contact in an integrated circuit App 20020037622 - Chan, Tsiu C. ;   et al. | 2002-03-28 |
Method of forming a landing pad structure in an integrated circuit Grant RE36,938 - Chan , et al. October 31, 2 | 2000-10-31 |
Shadow memory for a SRAM and method Grant 6,128,243 - Chan , et al. October 3, 2 | 2000-10-03 |
Silver metallization by damascene method Grant 6,100,194 - Chan , et al. August 8, 2 | 2000-08-08 |
Radiation hardened semiconductor memory Grant 6,091,630 - Chan , et al. July 18, 2 | 2000-07-18 |
Floating gate content addressable memory Grant 6,005,790 - Chan , et al. December 21, 1 | 1999-12-21 |
Field effect device with polycrystalline silicon channel Grant 5,770,892 - Chan , et al. June 23, 1 | 1998-06-23 |
Method of forming a landing pad structure in an integrated circuit Grant 5,702,979 - Chan , et al. December 30, 1 | 1997-12-30 |
Method of forming raised source/drain regions in a integrated circuit Grant 5,683,924 - Chan , et al. November 4, 1 | 1997-11-04 |
Virtual ground read only memory circuit Grant 5,623,438 - Guritz , et al. April 22, 1 | 1997-04-22 |
Method for forming interconnect in integrated circuits Grant 5,595,935 - Chan , et al. January 21, 1 | 1997-01-21 |
Manufacture of CMOS devices Grant 5,525,823 - Chan June 11, 1 | 1996-06-11 |
Local interconnect structure Grant 5,489,797 - Chan , et al. February 6, 1 | 1996-02-06 |
Method of forming local interconnect structure without P-N junction between active elements Grant 5,478,771 - Chan , et al. December 26, 1 | 1995-12-26 |
Method of making contact alignment for nonvolatile memory devices Grant 5,448,091 - Bryant , et al. September 5, 1 | 1995-09-05 |
SRAM cell and structure with polycrystalline p-channel load devices Grant 5,336,916 - Chan , et al. August 9, 1 | 1994-08-09 |
ESD protection circuit Grant 5,329,143 - Chan , et al. July 12, 1 | 1994-07-12 |
Coplanar twin-well integrated circuit structure Grant 5,300,797 - Bryant , et al. April 5, 1 | 1994-04-05 |
Electrostatic discharge protection structure Grant 5,272,371 - Bishop , et al. December 21, 1 | 1993-12-21 |
Contact alignment for integrated circuits Grant 5,231,043 - Chan , et al. July 27, 1 | 1993-07-27 |
Method of making SRAM cell and structure with polycrystalline p-channel load devices Grant 5,204,279 - Chan , et al. April 20, 1 | 1993-04-20 |
Method for fabricating semiconductor circuits Grant 5,196,233 - Chan , et al. March 23, 1 | 1993-03-23 |
Method of making SRAM cell and structure with polycrystalline P-channel load devices Grant 5,187,114 - Chan , et al. February 16, 1 | 1993-02-16 |
Polycrystalline silicon contact structure Grant 5,151,387 - Brady , et al. September 29, 1 | 1992-09-29 |
Field effect device with polycrystalline silicon channel Grant 5,135,888 - Chan , et al. | 1992-08-04 |
Method of making a stacked copacitor for DRAM cell Grant 5,116,776 - Chan , et al. May 26, 1 | 1992-05-26 |
Method for fabricating semiconductor devices by use of an N.sup.+ buried layer for complete isolation Grant 5,116,777 - Chan , et al. May 26, 1 | 1992-05-26 |
Method of making a stacked capacitor DRAM cell Grant 5,006,481 - Chan , et al. April 9, 1 | 1991-04-09 |
Method for forming a self-aligned source/drain contact for an MOS transistor Grant 4,868,138 - Chan , et al. September 19, 1 | 1989-09-19 |
Method of making mosfet by multiple implantations followed by a diffusion step Grant RE32,800 - Han , et al. December 13, 1 | 1988-12-13 |
Method of making a trench capacitor and dram memory cell Grant 4,679,300 - Chan , et al. July 14, 1 | 1987-07-14 |
Method of making MOSFET by multiple implantations followed by a diffusion step Grant 4,599,118 - Han , et al. July 8, 1 | 1986-07-08 |
Method for making a semiconductor device Grant 4,553,314 - Chan , et al. November 19, 1 | 1985-11-19 |
One transistor-one capacitor memory cell Grant 4,392,210 - Chan July 5, 1 | 1983-07-05 |
Extremely low current load device for integrated circuit Grant 4,297,721 - McKenny , et al. October 27, 1 | 1981-10-27 |
Method of making an extremely low current load device for integrated circuit Grant 4,290,185 - McKenny , et al. September 22, 1 | 1981-09-22 |
Symmetrical cell layout for static RAM Grant 4,125,854 - McKenny , et al. November 14, 1 | 1978-11-14 |
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