Chan; Paul G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chan; Paul G..The latest application filed is for "systems and methods for acquiring data for loads at different access times from hierarchical sources using a load queue as a temporary storage buffer and completing the load early".

Company Profile

0.13.2

Chan; Paul G. - Oakland CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Systems and methods for acquiring data for loads at different access times from hierarchical sources using a load queue as a temporary storage buffer and completing the load early Grant 10,552,334 - Avudaiyappan , et al. Fe	2020-02-04
Systems And Methods For Acquiring Data For Loads At Different Access Times From Hierarchical Sources Using A Load Queue As A Temporary Storage Buffer And Completing The Load Early App 20170199822 - AVUDAIYAPPAN; Karthikeyan ; et al.	2017-07-13
Systems and methods for acquiring data for loads at different access times from hierarchical sources using a load queue as a temporary storage buffer and completing the load early Grant 9,632,947 - Avudaiyappan , et al. April 25, 2	2017-04-25
Systems And Methods For Acquiring Data For Loads At Different Access Times From Hierarchical Sources Using A Load Queue As A Temporary Storage Buffer And Completing The Load Early App 20150052303 - Avudaiyappan; Karthikeyan ; et al.	2015-02-19
Cache rollback acceleration via a bank based versioning cache ciruit Grant 8,370,576 - Favor , et al. February 5, 2	2013-02-05
Data cache rollbacks for failed speculative traces with memory operations Grant 8,370,609 - Favor , et al. February 5, 2	2013-02-05
Trace based deallocation of entries in a versioning cache circuit Grant 8,051,247 - Favor , et al. November 1, 2	2011-11-01
Memory ordering queue/versioning cache circuit Grant 8,024,522 - Favor , et al. September 20, 2	2011-09-20
Checking for a memory ordering violation after a speculative cache write Grant 8,019,944 - Favor , et al. September 13, 2	2011-09-13
Rolling back a speculative update of a non-modifiable cache line Grant 8,010,745 - Favor , et al. August 30, 2	2011-08-30
Trace based rollback of a speculatively updated cache Grant 7,877,630 - Favor , et al. January 25, 2	2011-01-25
Memory ordering queue tightly coupled with a versioning cache circuit Grant 7,779,307 - Favor , et al. August 17, 2	2010-08-17
System interface unit Grant 7,644,221 - Chan , et al. January 5, 2	2010-01-05

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