loadpatents
name:-0.0095791816711426
name:-0.027533054351807
name:-0.02729606628418
Chan; Min Yu Patent Filings

Chan; Min Yu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chan; Min Yu.The latest application filed is for "packaged microelectronic components".

Company Profile
0.13.4
  • Chan; Min Yu - Singapore SG
  • Chan; Min Yu - Braddell Hill SG
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Packaged microelectronic components
Grant 9,418,872 - Eng , et al. August 16, 2
2016-08-16
Packaged Microelectronic Components
App 20140141544 - Eng; Meow Koon ;   et al.
2014-05-22
Packaged image sensing microelectronic devices including a lead and methods of packaging image sensing microelectronic devices including a lead
Grant 6,882,021 - Boon , et al. April 19, 2
2005-04-19
Packaged microelectronic devices and methods of packaging microelectronic devices
App 20040238909 - Boon, Suan Jeung ;   et al.
2004-12-02
Method of fabricating thin integrated circuit units
Grant 6,468,831 - Leong , et al. October 22, 2
2002-10-22
Method for adhering and sealing a silicon chip in an integrated circuit package
Grant 6,387,729 - Eng , et al. May 14, 2
2002-05-14
Integrated circuit package
Grant 6,365,833 - Eng , et al. April 2, 2
2002-04-02
Thin integrated circuit unit
App 20020000648 - Leong, Chew Weng ;   et al.
2002-01-03
Method for adhering and sealing a silicon chip in an integrated circuit package
App 20020001882 - Eng, Kian Teng ;   et al.
2002-01-03
Stacked double sided integrated circuit package
Grant 6,274,929 - Leong , et al. August 14, 2
2001-08-14
Encapsulate resin LOC package and method of fabrication
Grant 6,236,107 - Chan , et al. May 22, 2
2001-05-22
Semiconductor device testing and burn-in methodology
Grant 6,218,202 - Yew , et al. April 17, 2
2001-04-17
Thin stacked integrated circuit device
Grant 6,137,164 - Yew , et al. October 24, 2
2000-10-24
Method for adhering and sealing a silicon chip in an integrated circuit package
Grant 6,087,203 - Eng , et al. July 11, 2
2000-07-11
Chip size integrated circuit package
Grant 6,049,129 - Yew , et al. April 11, 2
2000-04-11
Slotted lead for a semiconductor device
Grant 6,040,623 - Chan , et al. March 21, 2
2000-03-21
Flexible pin location integrated circuit package
Grant 5,952,611 - Eng , et al. September 14, 1
1999-09-14

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