Chakradhar; Srimat T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chakradhar; Srimat T..The latest application filed is for "user-level manager to handle multi-processing on many-core coprocessor-based systems".

Company Profile

0.52.42

Chakradhar; Srimat T. - Manalapan NJ
Chakradhar; Srimat T - Manalapan NJ US
Chakradhar; Srimat T. - Princeton NJ
Chakradhar, Srimat T. - US
Chakradhar; Srimat T. - Old Bridge NJ
Chakradhar; Srimat T. - North Brunswick NJ
Chakradhar; Srimat T. - No. Brunswick NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Compiler-guided software accelerator for iterative HADOOP.RTM. jobs Grant 9,201,638 - Ravi , et al. December 1, 2	2015-12-01
Method for simultaneous scheduling of processes and offloading computation on many-core coprocessors Grant 9,152,467 - Cadambi , et al. October 6, 2	2015-10-06
Interference-driven resource management for GPU-based heterogeneous clusters Grant 9,135,741 - Li , et al. September 15, 2	2015-09-15
Automatic pipelining framework for heterogeneous parallel computing systems Grant 9,122,523 - Pienaar , et al. September 1, 2	2015-09-01
Optimizing data warehousing applications for GPUs using dynamic stream scheduling and dispatch of fused and split kernels Grant 8,990,827 - Wu , et al. March 24, 2	2015-03-24
Method and system to dynamically bind and unbind applications on a general purpose graphics processing unit Grant 8,917,279 - Becchi , et al. December 23, 2	2014-12-23
Energy efficient heterogeneous systems Grant 8,874,943 - Majumdar , et al. October 28, 2	2014-10-28
Method and system for memory aware runtime to support multitenancy in heterogeneous clusters Grant 8,806,503 - Becchi , et al. August 12, 2	2014-08-12
Computer-guided holistic optimization of MapReduce applications Grant 8,793,674 - Ravi , et al. July 29, 2	2014-07-29
Methods Of Processing Core Selection For Applications On Manycore Processors App 20140208331 - Li; Cheng-Hong ; et al.	2014-07-24
Method For Simultaneous Scheduling Of Processes And Offloading Computation On Many-core Coprocessors App 20140208327 - Cadambi; Srihari ; et al.	2014-07-24
User-level Manager To Handle Multi-processing On Many-core Coprocessor-based Systems App 20140208072 - Cadambi; Srihari ; et al.	2014-07-24
Compiler-guided Software Accelerator For Iterative Hadoop Jobs App 20140047422 - Ravi; Nishkam ; et al.	2014-02-13
Automatic Pipelining Framework For Heterogeneous Parallel Computing Systems App 20130298130 - Pienaar; Jacques ; et al.	2013-11-07
Interference-driven Resource Management For Gpu-based Heterogeneous Clusters App 20130191612 - Li; Cheng-Hong ; et al.	2013-07-25
Computer-Guided Holistic Optimization of MapReduce Applications App 20130097593 - Ravi; Nishkam ; et al.	2013-04-18
Optimizing Data Warehousing Applications For Gpus Using Dynamic Stream Scheduling And Dispatch Of Fused And Split Kernels App 20130091507 - Wu; Haicheng ; et al.	2013-04-11
System and method for parallelizing and accelerating learning machine training and classification using a massively parallel accelerator Grant 8,359,281 - Cadambi , et al. January 22, 2	2013-01-22
Method and system to dynamically bind and unbind applications on a general purpose graphics processing unit App 20120188263 - Becchi; Michela ; et al.	2012-07-26
Method and System for Memory Aware Runtime to Support Multitenancy in Heterogeneous Clusters App 20120192198 - Becchi; Michela ; et al.	2012-07-26
Methods and systems for managing computations on a hybrid computing platform including a parallel accelerator Grant 8,225,074 - Chakradhar , et al. July 17, 2	2012-07-17
Method for blocking unknown values in output response of scan test patterns for testing circuits Grant 7,818,643 - Wang , et al. October 19, 2	2010-10-19
Automatically boosting the software content of system LSI designs Grant 7,784,046 - Lajolo , et al. August 24, 2	2010-08-24
Methods And Systems For Managing Computations On A Hybrid Computing Platform Including A Parallel Accelerator App 20100088490 - Chakradhar; Srimat T. ; et al.	2010-04-08
Storage-efficient and collision-free hash-based packet processing architecture and method Grant 7,653,670 - Hasan , et al. January 26, 2	2010-01-26
System and Method for Parallelizing and Accelerating Learning Machine Training and Classification Using a Massively Parallel Accelerator App 20090304268 - Cadambi; Srihari ; et al.	2009-12-10
Method and apparatus for testing logic circuit designs Grant 7,610,539 - Balakrishnan , et al. October 27, 2	2009-10-27
Test output compaction with improved blocking of unknown values Grant 7,610,527 - Wang , et al. October 27, 2	2009-10-27
Method for generating, from a test cube set, a generator configured to generate a test pattern Grant 7,610,540 - Balakrishnan , et al. October 27, 2	2009-10-27
Information retrieval architecture for packet classification Grant 7,592,935 - Cadambi , et al. September 22, 2	2009-09-22
Method and system usable in sensor networks for handling memory faults Grant 7,581,142 - Sultan , et al. August 25, 2	2009-08-25
Method for Blocking Unknown Values in Output Response of Scan Test Patterns for Testing Circuits App 20090210762 - Wang; Seongmoon ; et al.	2009-08-20
Re-configurable embedded core test protocol for system-on-chips (SOC) and circuit boards Grant 7,577,540 - Wang , et al. August 18, 2	2009-08-18
Method and apparatus for structured ASIC test point insertion Grant 7,562,321 - Wang , et al. July 14, 2	2009-07-14
Method And Apparatus For Testing Logic Circuit Designs App 20090119556 - Balakrishnan; Kedarnath ; et al.	2009-05-07
Method And Apparatus For Testing Logic Circuit Designs App 20090119563 - Balakrishnan; Kedarnath ; et al.	2009-05-07
Method and apparatus for testing logic circuit designs Grant 7,484,151 - Balakrishnan , et al. January 27, 2	2009-01-27
Voice-based Multimodal Speaker Authentication Using Adaptive Training And Applications Thereof App 20080059176 - RAVI; Srivaths ; et al.	2008-03-06
Fast And Scalable Process For Regular Expression Search App 20080034427 - Cadambi; Srihari ; et al.	2008-02-07
Test output compaction for responses with unknown values Grant 7,313,746 - Chao , et al. December 25, 2	2007-12-25
Hybrid scan-based delay testing technique for compact and high fault coverage test set Grant 7,313,743 - Wang , et al. December 25, 2	2007-12-25
Test pattern compression with pattern-independent design-independent seed compression Grant 7,302,626 - Balakrishnan , et al. November 27, 2	2007-11-27
Method and Apparatus for Testing an Integrated Circuit App 20070266283 - Balakrishnan; Kedarnath ; et al.	2007-11-15
Externally-loaded weighted random test pattern compression Grant 7,284,176 - Wang , et al. October 16, 2	2007-10-16
Method and system usable in sensor networks for handling memory faults App 20070156951 - Sultan; Florin ; et al.	2007-07-05
Method and Apparatus for Structured ASIC Test Point Insertion App 20070136700 - Wang; Seongmoon ; et al.	2007-06-14
Storage-efficient And Collision-free Hash-based Packet Processing Architecture And Method App 20070136331 - HASAN; Jahangir ; et al.	2007-06-14
Test output compaction using response shaper Grant 7,222,277 - Wang , et al. May 22, 2	2007-05-22
Method and Apparatus for Testing Logic Circuit Designs App 20070113129 - Balakrishnan; Kedarnath ; et al.	2007-05-17
Apparatus and Method for Improving Security of a Bus Based System Through Communication Architecture Enhancements App 20070101424 - Ravi; Srivaths ; et al.	2007-05-03
Test Output Compaction for Responses with Unknown Values App 20070088999 - Chao; Chia-Tso ; et al.	2007-04-19
Restricted scan reordering technique to enhance delay fault coverage Grant 7,188,323 - Wang , et al. March 6, 2	2007-03-06
Storage architecture for embedded systems App 20070005625 - Lekatsas; Haris ; et al.	2007-01-04
Method and apparatus for efficient register-transfer level (RTL) power estimation Grant 7,134,100 - Ravi , et al. November 7, 2	2006-11-07
Automatically boosting the software content of system LSI designs App 20060236300 - Lajolo; Marcello ; et al.	2006-10-19
Test pattern compression with pattern-independent design-independent seed compression App 20060112320 - Balakrishnan; Kedarnath ; et al.	2006-05-25
Test output compaction using response shaper App 20060101316 - Wang; Seongmoon ; et al.	2006-05-11
System-level power estimation using heteregeneous power models App 20060080076 - Lahiri; Kanishka ; et al.	2006-04-13
Compression system and method App 20060069857 - Lekatsas; Haris ; et al.	2006-03-30
Content-based information retrieval architecture Grant 7,019,674 - Cadambi , et al. March 28, 2	2006-03-28
Externally-loaded weighted random test pattern compression App 20060015787 - Wang; Seongmoon ; et al.	2006-01-19
Restricted scan reordering technique to enhance delay fault coverage App 20050235183 - Wang, Seongmoon ; et al.	2005-10-20
Tamper resistant secure architecture App 20050204155 - Ravi, Srivaths ; et al.	2005-09-15
Content-based information retrieval architecture App 20050174272 - Cadambi, Srihari ; et al.	2005-08-11
System-level test architecture for delivery of compressed tests App 20050097413 - Ravi, Srivaths ; et al.	2005-05-05
Hybrid scan-based delay testing technique for compact and high fault coverage test set App 20050066242 - Wang, Seongmoon ; et al.	2005-03-24
Power mode based macro-models for power estimation of electronic circuits Grant 6,735,744 - Raghunathan , et al. May 11, 2	2004-05-11
Method and apparatus for efficient register-transfer level (RTL) power estimation App 20040019859 - Ravi, Srivaths ; et al.	2004-01-29
Re-configurable embedded core test protocol for system-on-chips (SOC) and circuit boards App 20030167144 - Wang, Seongmoon ; et al.	2003-09-04
Segmented compaction with pruning and critical fault elimination Grant 6,467,058 - Chakradhar , et al. October 15, 2	2002-10-15
Power mode based macro-models for power estimation of electronic circuits App 20020133792 - Raghunathan, Anand ; et al.	2002-09-19
System and method for testing high speed VLSI devices using slower testers Grant 6,345,373 - Chakradhar , et al. February 5, 2	2002-02-05
Vector restoration using accelerated validation and refinement Grant 6,223,316 - Bommu , et al. April 24, 2	2001-04-24
Static test sequence compaction using two-phase restoration and segment manipulation Grant 5,987,636 - Bommu , et al. November 16, 1	1999-11-16
Method for testing asynchronous circuits Grant 5,958,077 - Banerjee , et al. September 28, 1	1999-09-28
Deriving signal constraints to accelerate sequential test generation Grant 5,875,196 - Chakradhar , et al. February 23, 1	1999-02-23
Method for synthesizing a sequential circuit Grant 5,731,983 - Balakrishnan , et al. March 24, 1	1998-03-24
Process for dynamic composition and test cycles reduction Grant 5,726,996 - Chakradhar , et al. March 10, 1	1998-03-10
Redesign of sequential circuits to reduce clock period Grant 5,663,888 - Chakradhar September 2, 1	1997-09-02
Testing and removal of redundancies in VLSI circuits with non-boolean primitives Grant 5,657,240 - Chakradhar , et al. August 12, 1	1997-08-12
Optimal retiming of synchronous logic circuits Grant 5,555,188 - Chakradhar September 10, 1	1996-09-10
Resynthesis and retiming for optimum partial scan testing Grant 5,502,647 - Chakradhar , et al. March 26, 1	1996-03-26
Initializable asynchronous circuit design Grant 5,493,505 - Banerjee , et al. February 20, 1	1996-02-20
VLSI circuits designed for testability and methods for producing them Grant 5,461,573 - Chakradhar , et al. October 24, 1	1995-10-24

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.