loadpatents
name:-0.00679612159729
name:-0.0084400177001953
name:-0.0068669319152832
Chakraborty; Abhishek Patent Filings

Chakraborty; Abhishek

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chakraborty; Abhishek.The latest application filed is for "multicast source discovery protocol (msdp) loop avoidance".

Company Profile
6.10.6
  • Chakraborty; Abhishek - Bangalore IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multicast Source Discovery Protocol (msdp) Loop Avoidance
App 20210392009 - Jyoti; Alisha ;   et al.
2021-12-16
Reducing open shortest path first protocol link flap
Grant 11,088,939 - Manur , et al. August 10, 2
2021-08-10
Rendezvous point (RP) router with improved processing of first hop router (FHR) information in a protocol independent multicast (PIM) network domain
Grant 10,958,564 - Asthana , et al. March 23, 2
2021-03-23
Reducing traffic loss during network device failure in an open shortest path first (OSPF) protocol-based local area network
Grant 10,735,313 - Bhat , et al.
2020-08-04
Protocol independent multicast ("PIM") fault tolerant designated router ("DR") election
Grant 10,728,137 - Chakraborty , et al.
2020-07-28
Reducing Traffic Loss During Network Device Failure In An Open Shortest Path First (ospf) Protocol-based Local Area Network
App 20200127918 - Bhat; Bharath RadhaKrishna ;   et al.
2020-04-23
Concurrent code application in a stateful computing environment
Grant 10,382,585 - Alluri , et al. A
2019-08-13
Concurrent code application in a stateful computing environment
Grant 10,382,584 - Alluri , et al. A
2019-08-13
Concurrent Code Application In A Stateful Computing Environment
App 20170242682 - Alluri; Sudhir ;   et al.
2017-08-24
Concurrent Code Application In A Stateful Computing Environment
App 20170242681 - Alluri; Sudhir ;   et al.
2017-08-24
Delay circuits for simulating delays based on a single cycle of a clock signal
Grant 8,786,347 - Chakraborty , et al. July 22, 2
2014-07-22
Methods and circuits for enabling slew rate programmability and compensation of input/output circuits
Grant 8,686,777 - Narang , et al. April 1, 2
2014-04-01
Document processing
Grant 8,593,697 - Sankarasubramaniam , et al. November 26, 2
2013-11-26
Document Processing
App 20110170144 - SANKARASUBRAMANIAM; Yogesh ;   et al.
2011-07-14
Uncompromised standard input set-up time with improved enable input set-up time characteristics in a storage circuit
App 20070260951 - Subramanian; Ramakrishnan Karungulam ;   et al.
2007-11-08

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