Chai; Tai Chong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chai; Tai Chong.The latest application filed is for "electrical connection structure, semiconductor package and method of forming the same".

Company Profile

2.6.6

Chai; Tai Chong - Singapore SG
Chai, Tai-Chong - Sinapore SG

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Electrical connection structure, semiconductor package and method of forming the same Grant 10,755,993 - Ho , et al. A	2020-08-25
Electrical Connection Structure, Semiconductor Package And Method Of Forming The Same App 20190080974 - HO; David ; et al.	2019-03-14
Bonding stress testing arrangement and method of determining stress Grant 9,506,823 - Selvanayagam , et al. November 29, 2	2016-11-29
Bonding Stress Testing Arrangement and Method of Determining Stress App 20130199303 - Selvanayagam; Cheryl Sharmani ; et al.	2013-08-08
Substrate Arrangement and a Method of Manufacturing a Substrate Arrangement App 20120126419 - Kripesh; Vaidyanathan ; et al.	2012-05-24
Wafer level packages and methods of fabrication Grant 7,189,594 - Kripesh , et al. March 13, 2	2007-03-13
Wafer level packages and methods of fabrication App 20060057832 - Kripesh; Vaidyanathan ; et al.	2006-03-16
Lead frame for an integrated circuit chip Grant 6,621,151 - Chai , et al. September 16, 2	2003-09-16
Lead frame for an integrated circuit chip (integrated circuit peripheral support) App 20020163078 - Chai, Tai-Chong ; et al.	2002-11-07
Apparatus for dispensing fluid in an array pattern Grant 5,967,577 - Bhandarkar , et al. October 19, 1	1999-10-19

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