Chai; Jesse C.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Chai; Jesse C..The latest application filed is for "method and apparatus for dual protection of a protected memory block".
- Chai; Jesse C. - Chandler AZ
| Patent | Date |
|---|---|
| Circuit board having an overlapping via Grant 7,064,279 - Meyer , et al. June 20, 2 | 2006-06-20 |
| Method and apparatus for dual protection of a protected memory block App 20060117156 - Chai; Jesse C. ; et al. | 2006-06-01 |
| Circuit board having an overlapping Via App 20060060380 - Meyer; Matthew C. ; et al. | 2006-03-23 |
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