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name:-0.010159969329834
name:-0.010004043579102
name:-0.0042970180511475
Cerezo; Jorge Patent Filings

Cerezo; Jorge

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cerezo; Jorge.The latest application filed is for "transistor with integrated active protection".

Company Profile
3.7.7
  • Cerezo; Jorge - Palos Verdes Peninsula CA
  • Cerezo; Jorge - Palos Verdes Peninsu CA
  • Cerezo; Jorge - Palos Verdes CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistor with integrated active protection
Grant 11,388,784 - Bredemeier , et al. July 12, 2
2022-07-12
Transistor with Integrated Active Protection
App 20200337122 - Bredemeier; Peter ;   et al.
2020-10-22
Transistor with integrated active protection
Grant 10,728,960 - Bredemeier , et al.
2020-07-28
Power converter with tank circuit and over-voltage protection
Grant 10,205,380 - Ribarich , et al. Feb
2019-02-12
Transistor With Integrated Active Protection
App 20180270913 - Bredemeier; Peter ;   et al.
2018-09-20
Power Converter with Tank Circuit and Over-Voltage Protection
App 20170170718 - Ribarich; Thomas J. ;   et al.
2017-06-15
Power converter with tank circuit and over-voltage protection
Grant 9,578,692 - Ribarich , et al. February 21, 2
2017-02-21
Power Converter with Over-Voltage Protection
App 20130277362 - Ribarich; Thomas J. ;   et al.
2013-10-24
Audio amplifier assembly
Grant 7,692,316 - Cao , et al. April 6, 2
2010-04-06
Dual semiconductor die package with reverse lead form
Grant 7,250,672 - Pavier , et al. July 31, 2
2007-07-31
Half-bridge package
Grant 7,227,198 - Pavier , et al. June 5, 2
2007-06-05
Audio amplifier assembly
App 20060087026 - Cao; Jianjun ;   et al.
2006-04-27
Half-bridge package
App 20060033122 - Pavier; Mark ;   et al.
2006-02-16
Dual semiconductor die package with reverse lead form
App 20050133902 - Pavier, Mark ;   et al.
2005-06-23

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