Catherwood; Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Catherwood; Michael.The latest application filed is for "apparatus and method for protecting program memory for processing cores in a multi-core integrated circuit".

Company Profile

5.15.17

Catherwood; Michael - Georgetown TX
Catherwood; Michael - Pepperell MA
Catherwood; Michael - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Central processing unit with enhanced instruction set Grant 10,983,931 - Catherwood , et al. April 20, 2	2021-04-20
Central processing unit with DSP engine and enhanced context switch capabilities Grant 10,802,866 - Catherwood , et al. October 13, 2	2020-10-13
Apparatus and method for protecting program memory for processing cores in a multi-core integrated circuit Grant 10,776,292 - Catherwood , et al. Sept	2020-09-15
Apparatus And Method For Protecting Program Memory For Processing Cores In A Multi-core Integrated Circuit App 20190188163 - Catherwood; Michael ; et al.	2019-06-20
Run time ECC error injection scheme for hardware validation Grant 10,248,521 - Catherwood , et al.	2019-04-02
Configurable mailbox data buffer apparatus Grant 10,120,815 - Catherwood , et al. November 6, 2	2018-11-06
Configurable Mailbox Data Buffer Apparatus App 20160371200 - Catherwood; Michael ; et al.	2016-12-22
Central Processing Unit With DSP Engine And Enhanced Context Switch Capabilities App 20160321075 - Catherwood; Michael ; et al.	2016-11-03
Central Processing Unit With Enhanced Instruction Set App 20160321202 - Catherwood; Michael ; et al.	2016-11-03
Run Time ECC Error Injection Scheme for Hardware Validation App 20160292059 - Catherwood; Michael ; et al.	2016-10-06
Peripheral trigger generator Grant 8,856,406 - Kris , et al. October 7, 2	2014-10-07
Peripheral Trigger Generator App 20140075052 - Kris; Bryan ; et al.	2014-03-13
External device power control during low power sleep mode without central processing unit intervention Grant 8,645,729 - Simmons , et al. February 4, 2	2014-02-04
External Device Power Control During Low Power Sleep Mode Without Central Processing Unit Intervention App 20110179297 - Simmons; Michael ; et al.	2011-07-21
Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection Grant 7,243,372 - Catherwood July 10, 2	2007-07-10
Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection Grant 7,007,172 - Catherwood February 28, 2	2006-02-28
Repeat instruction with interrupt Grant 6,976,158 - Catherwood , et al. December 13, 2	2005-12-13
Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection App 20050210284 - Catherwood, Michael	2005-09-22
Modified Harvard architecture processor having program memory space mapped to data memory space Grant 6,728,856 - Grosbach , et al. April 27, 2	2004-04-27
Dynamically reconfigurable data space Grant 6,601,160 - Catherwood , et al. July 29, 2	2003-07-29
Dynamically reconfigurable data space App 20030028743 - Catherwood, Michael ; et al.	2003-02-06
Low overhead interrupt App 20030028696 - Catherwood, Michael ; et al.	2003-02-06
Shadow register array control instructions App 20030023836 - Catherwood, Michael ; et al.	2003-01-30
Modified harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection App 20030005245 - Catherwood, Michael	2003-01-02
Repeat instruction with interrupt App 20020194466 - Catherwood, Michael ; et al.	2002-12-19
Bit replacement and extraction instructions App 20020188830 - Boles, Brian ; et al.	2002-12-12
Modified Harvard architecture processor having data memory space mapped to program memory space App 20020184465 - Grosbach, James H. ; et al.	2002-12-05
Register pointer trap App 20020184566 - Catherwood, Michael	2002-12-05
Method and apparatus for performing restricted modulo arithmetic Grant 5,249,148 - Catherwood , et al. September 28, 1	1993-09-28

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