Carruthers; Roy Arthur

Patent Applications and Registrations

Patent applications and USPTO patent grants for Carruthers; Roy Arthur.The latest application filed is for "multilayer interconnect structure containing air gaps and method for making".

Company Profile

0.11.12

Carruthers; Roy Arthur - Stormville NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy Grant 7,102,234 - Cabral, Jr. , et al. September 5, 2	2006-09-05
Multilayer interconnect structure containing air gaps and method for making Grant 7,098,476 - Babich , et al. August 29, 2	2006-08-29
Structure for controlling the interface roughness of cobalt disilicide Grant 7,081,676 - Agnello , et al. July 25, 2	2006-07-25
Multilayer interconnect structure containing air gaps and method for making App 20050037604 - Babich, Katherina E. ; et al.	2005-02-17
Multilayer interconnect structure containing air gaps and method for making Grant 6,815,329 - Babich , et al. November 9, 2	2004-11-09
Method and structure for controlling the interface roughness of cobalt disilicide Grant 6,809,030 - Agnello , et al. October 26, 2	2004-10-26
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy App 20040195695 - Cabral,, Cyril JR. ; et al.	2004-10-07
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy Grant 6,753,606 - Cabral, Jr. , et al. June 22, 2	2004-06-22
Method and structure for controlling the interface roughness of cobalt disilicide App 20040087160 - Agnello, Paul David ; et al.	2004-05-06
Apparatus and method for forming uniformly thick anodized films on large substrates App 20040077140 - Andricacos, Panayotis C. ; et al.	2004-04-22
Self-aligned silicide (salicide) process for strained silicon MOSFET on SiGe and structure formed thereby App 20030068883 - Ajmera, Atul Champaklal ; et al.	2003-04-10
Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby Grant 6,503,833 - Ajmera , et al. January 7, 2	2003-01-07
Method and structure for controlling the interface roughness of cobalt disilicide App 20020182836 - Agnello, Paul David ; et al.	2002-12-05
Multilayer interconnect structure containing air gaps and method for making App 20020158337 - Babich, Katherina E. ; et al.	2002-10-31
Method and structure for retarding high temperature agglomeration of silicides using alloys App 20020151158 - Cabral, Cyril JR. ; et al.	2002-10-17
Self-aligned silicide process for reduction of Si consumption in shallow junction and thin SOI electronic devices Grant 6,444,578 - Cabral, Jr. , et al. September 3, 2	2002-09-03
Method and structure for controlling the interface roughness of cobalt disilicide Grant 6,440,851 - Agnello , et al. August 27, 2	2002-08-27
Self-aligned silicide process for reduction of Si consumption in shallow junction and thin SOI electronic devices App 20020115262 - Cabral, Cyril JR. ; et al.	2002-08-22
Interconnects with Ti-containing liners App 20020076574 - Cabral, Cyril JR. ; et al.	2002-06-20
Method And Structure For Retarding High Temperature Agglomeration Of Silicides Using Alloys App 20020061636 - Cabral, Cyril JR. ; et al.	2002-05-23
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy App 20020042197 - Cabral,, Cyril JR. ; et al.	2002-04-11
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy Grant 6,331,486 - Cabral, Jr. , et al. December 18, 2	2001-12-18
Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging Grant 6,323,130 - Brodsky , et al. November 27, 2	2001-11-27

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