Carruthers; Roy A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Carruthers; Roy A..The latest application filed is for "silicidation of device contacts using pre-amorphization implant of semiconductor substrate".

Company Profile

0.20.27

Carruthers; Roy A. - Stormville NY US
Carruthers; Roy A. - Stromville NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Graphene formation utilizing solid phase carbon sources Grant 8,927,057 - Bol , et al. January 6, 2	2015-01-06
Silicidation Of Device Contacts Using Pre-amorphization Implant Of Semiconductor Substrate App 20130049199 - Besser; Paul R. ; et al.	2013-02-28
Silicidation Of Device Contacts Using Pre-amorphization Implant Of Semiconductor Substrate App 20130049200 - Besser; Paul R. ; et al.	2013-02-28
Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby Grant 8,154,130 - Cabral, Jr. , et al. April 10, 2	2012-04-10
Reduction of silicide formation temperature on SiGe containing substrates Grant 8,125,082 - Cabral, Jr. , et al. February 28, 2	2012-02-28
Self-aligned process for nanotube/nanowire FETs Grant 8,119,466 - Avouris , et al. February 21, 2	2012-02-21
SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs App 20110256675 - Avouris; Phaedon ; et al.	2011-10-20
Graphene Formation Utilizing Solid Phase Carbon Sources App 20110206934 - Bol; Ageeth A. ; et al.	2011-08-25
Self-aligned process for nanotube/nanowire FETs Grant 8,003,453 - Avouris , et al. August 23, 2	2011-08-23
Quasi-pyramidal Textured Surfaces Using Phase-segregated Masks App 20110162702 - Carruthers; Roy A. ; et al.	2011-07-07
Method and process for reducing undercooling in a lead-free tin-rich solder alloy Grant 7,784,669 - Hougham , et al. August 31, 2	2010-08-31
Method And Process For Reducing Undercooling In A Lead-free Tin-rich Solder Alloy App 20100155456 - HOUGHAM; GARETH G. ; et al.	2010-06-24
Method and process for reducing undercooling in a lead-free tin-rich solder alloy Grant 7,703,661 - Hougham , et al. April 27, 2	2010-04-27
Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby Grant 7,682,968 - Cabral, Jr. , et al. March 23, 2	2010-03-23
Self-aligned process for nanotube/nanowire FETs Grant 7,598,516 - Avouris , et al. October 6, 2	2009-10-06
Stabilization of Ni monosilicide thin films in CMOS devices using implantation of ions before silicidation Grant 7,517,795 - Carruthers , et al. April 14, 2	2009-04-14
STABILIZATION OF Ni MONOSILICIDE THIN FILMS IN CMOS DEVICES USING IMPLANTATION OF IONS BEFORE SILICIDATION App 20080299720 - Carruthers; Roy A. ; et al.	2008-12-04
Method And Process For Reducing Undercooling In A Lead-free Tin-rich Solder Alloy App 20080290142 - Hougham; Gareth G. ; et al.	2008-11-27
Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby Grant 7,449,782 - Cabral, Jr. , et al. November 11, 2	2008-11-11
REDUCTION OF SILICIDE FORMATION TEMPERATURE ON SiGe CONTAINING SUBSTRATES App 20080246120 - Cabral; Cyril ; et al.	2008-10-09
SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs App 20080227259 - Avouris; Phaedon ; et al.	2008-09-18
SELF-ALIGNED METAL TO FORM CONTACTS TO Ge CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY App 20080227283 - Cabral; Cyril ; et al.	2008-09-18
SELF-ALIGNED METAL TO FORM CONTACTS TO Ge CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY App 20080220606 - Cabral; Cyril ; et al.	2008-09-11
Reduction of silicide formation temperature on SiGe containing substrates Grant 7,384,868 - Cabral, Jr. , et al. June 10, 2	2008-06-10
SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs App 20080026534 - Avouris; Phaedon ; et al.	2008-01-31
Retarding agglomeration of Ni monosilicide using Ni alloys Grant 7,271,486 - Cabral, Jr. , et al. September 18, 2	2007-09-18
On-chip Cu interconnection using 1 to 5 nm thick metal cap Grant 7,247,946 - Bruley , et al. July 24, 2	2007-07-24
STABILIZATION OF Ni MONOSILICIDE THIN FILMS IN CMOS DEVICES USING IMPLANTATION OF IONS BEFORE SILICIDATION App 20070042586 - Carruthers; Roy A. ; et al.	2007-02-22
Stabilization of Ni monosilicide thin films in CMOS devices using implantation of ions before silicidation Grant 7,119,012 - Carruthers , et al. October 10, 2	2006-10-10
On-chip Cu interconnection using 1 to 5 nm thick metal cap App 20060160350 - Bruley; John ; et al.	2006-07-20
Self-aligned process for nanotube/nanowire FETs App 20060151844 - Avouris; Phaedon ; et al.	2006-07-13
Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device Grant 6,972,250 - Cabral, Jr. , et al. December 6, 2	2005-12-06
CVD tantalum compounds for FET gate electrodes App 20050250318 - Narayanan, Vijay ; et al.	2005-11-10
Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby App 20050250301 - Cabral, Cyril JR. ; et al.	2005-11-10
Stabilization of Ni monosilicide thin films in CMOS devices using implantation of ions before silicidation App 20050250319 - Carruthers, Roy A. ; et al.	2005-11-10
Retarding agglomeration of Ni monosilicide using Ni alloys App 20050176247 - Cabral, Cyril JR. ; et al.	2005-08-11
Retarding agglomeration of Ni monosilicide using Ni alloys Grant 6,905,560 - Cabral, Jr. , et al. June 14, 2	2005-06-14
CVD tantalum compounds for FET get electrodes App 20050104142 - Narayanan, Vijav ; et al.	2005-05-19
Reduction of silicide formation temperature on SiGe containing substrates App 20050059242 - Cabral, Cyril JR. ; et al.	2005-03-17
Retarding agglomeration of Ni monosilicide using Ni alloys App 20040123922 - Cabral, Cyril JR. ; et al.	2004-07-01
Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device Grant 6,690,072 - Cabral, Jr. , et al. February 10, 2	2004-02-10
Method And Structure For Ultra-low Contact Resistance Cmos Formed By Vertically Self-aligned Cosi2 On Raised Source Drain Si/sige Device App 20030219965 - Cabral, Cyril JR. ; et al.	2003-11-27
Method and structure for ultra-low contact resistance CMOS formed by vertically self-alligned CoSi2 on raised source drain Si/SiGe device App 20030219971 - Cabral, Cyril JR. ; et al.	2003-11-27
Structure and fabrication of SiCr microfuses Grant 5,340,775 - Carruthers , et al. August 23, 1	1994-08-23

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