Carrillo; Jorge Ernesto

Patent Applications and Registrations

Patent applications and USPTO patent grants for Carrillo; Jorge Ernesto.The latest application filed is for "coprocessor interface architecture and methods of operating the same".

Company Profile

0.11.0

Carrillo; Jorge Ernesto - San Jose CA US
Carrillo; Jorge Ernesto - Belmont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Coprocessor interface architecture and methods of operating the same Grant 8,447,957 - Carrillo , et al. May 21, 2	2013-05-21
Framework for cycle accurate simulation Grant 7,606,694 - Carrillo , et al. October 20, 2	2009-10-20
Building a simulation of design block using a bus functional model and an HDL testbench Grant 7,505,887 - Canaris , et al. March 17, 2	2009-03-17
Method and system to recreate instruction and data traces in an embedded processor Grant 7,490,227 - Bilski , et al. February 10, 2	2009-02-10
Comparator and method of implementing a comparator in a device having programmable logic Grant 7,453,286 - Carrillo , et al. November 18, 2	2008-11-18
Simulation of a programming language specification of a circuit design Grant 7,437,701 - Dutra , et al. October 14, 2	2008-10-14
Method and circuit for decoding an address of an address space Grant 7,426,583 - Dutra , et al. September 16, 2	2008-09-16
Building a simulation environment for a design block Grant 7,386,827 - Zhu , et al. June 10, 2	2008-06-10
Verification environment creation infrastructure for bus-based systems and modules Grant 7,315,803 - Carrillo , et al. January 1, 2	2008-01-01
Accumulator-based load-store CPU architecture implementation in a programmable logic device Grant 6,963,966 - Carrillo November 8, 2	2005-11-08

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