Carpenter; Roger
Patent Applications and Registrations
Patent applications and USPTO patent grants for Carpenter; Roger.The latest application filed is for "multi-threshold circuitry based on silicon-on-insulator technology".
- Carpenter; Roger - Palo Alto CA
| Patent | Date |
|---|---|
| Multi-threshold circuitry based on silicon-on-insulator technology Grant 9,257,984 - Singh , et al. February 9, 2 | 2016-02-09 |
| Multi-threshold Circuitry Based On Silicon-on-insulator Technology App 20150076564 - Singh; Gajendra Prasad ; et al. | 2015-03-19 |
| Method for repeated block modification for chip routing Grant 8,893,070 - Avidan , et al. November 18, 2 | 2014-11-18 |
| Method For Repeated Block Modification For Chip Routing App 20130227511 - Avidan; Jacob ; et al. | 2013-08-29 |
| Method for repeated block modification for chip routing Grant 8,407,650 - Avidan , et al. March 26, 2 | 2013-03-26 |
| Method for repeated block timing analysis Grant 7,971,168 - Swanson , et al. June 28, 2 | 2011-06-28 |
| Relative Floorplanning For Improved Integrated Circuit Design App 20070266359 - Esbensen; Henrik ; et al. | 2007-11-15 |
| System And Method For Placement Of Soft Macros App 20070245280 - Van Eijk; Cornells ; et al. | 2007-10-18 |
| Placement-Driven Physical-Hierarchy Generation App 20070245281 - Riepe; Michael A. ; et al. | 2007-10-18 |
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