Patent | Date |
---|
DNA manufacturing, storage, and access system Grant 11,439,970 - Nguyen , et al. September 13, 2 | 2022-09-13 |
Syndrome data compression for quantum computing devices Grant 11,410,070 - Das , et al. August 9, 2 | 2022-08-09 |
Pipelined Hardware Decoder For Quantum Computing Devices App 20210042650 - DAS; Poulami ;   et al. | 2021-02-11 |
Syndrome Data Compression For Quantum Computing Devices App 20210042652 - DAS; Poulami ;   et al. | 2021-02-11 |
Systems For Coupling Decoders To Quantum Registers App 20210042651 - DAS; Poulami ;   et al. | 2021-02-11 |
Dna Manufacturing, Storage, And Access System App 20190358604 - Nguyen; Bichlien H. ;   et al. | 2019-11-28 |
Phase-mode based superconducting logic Grant 9,887,700 - Carmean , et al. February 6, 2 | 2018-02-06 |
Distribution of tasks among asymmetric processing elements Grant 9,874,926 - Hum , et al. January 23, 2 | 2018-01-23 |
Wave-pipelined logic circuit scanning system Grant 9,864,005 - Carmean , et al. January 9, 2 | 2018-01-09 |
Distribution of tasks among asymmetric processing elements Grant 9,829,965 - Hum , et al. November 28, 2 | 2017-11-28 |
Distribution of tasks among asymmetric processing elements Grant 9,753,530 - Hum , et al. September 5, 2 | 2017-09-05 |
Phase-mode Based Superconducting Logic App 20170117901 - Carmean; Douglas ;   et al. | 2017-04-27 |
Phase-mode based superconducting logic Grant 9,543,959 - Carmean , et al. January 10, 2 | 2017-01-10 |
Automated privacy adjustments to video conferencing streams Grant 9,313,454 - Lalonde , et al. April 12, 2 | 2016-04-12 |
Distribution Of Tasks Among Asymmetric Processing Elements App 20150012731 - HUM; Herbert ;   et al. | 2015-01-08 |
Distribution Of Tasks Among Asymmetric Processing Elements App 20150012766 - HUM; Herbert ;   et al. | 2015-01-08 |
Distribution Of Tasks Among Asymmetric Processing Elements App 20150012765 - HUM; Herbert ;   et al. | 2015-01-08 |
Automated Privacy Adjustments To Video Conferencing Streams App 20140368604 - Lalonde; Paul ;   et al. | 2014-12-18 |
Clock distribution system for selectively enabling clock signals to portions of a pipelined circuit Grant 6,611,920 - Fletcher , et al. August 26, 2 | 2003-08-26 |
System for loading PLL from bus fraction register when bus fraction register is in either first or second state and bus unit not busy Grant 5,630,107 - Carmean , et al. May 13, 1 | 1997-05-13 |
Method and apparatus for optimizing electronic circuits Grant 5,459,673 - Carmean , et al. October 17, 1 | 1995-10-17 |