Cargnoni; Robert Alan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cargnoni; Robert Alan.The latest application filed is for "load request scheduling in a cache hierarchy".

Company Profile

0.34.32

Cargnoni; Robert Alan - Austin TX US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Information handling system including a multiple compute element processor with distributed data on-ramp data-off ramp topology Grant 8,429,382 - Cargnoni , et al. April 23, 2	2013-04-23
Enhanced processor virtualization mechanism via saving and restoring soft processor/system states Grant 7,849,298 - Arimilli , et al. December 7, 2	2010-12-07
Load Request Scheduling In A Cache Hierarchy App 20100268882 - Cargnoni; Robert Alan ; et al.	2010-10-21
Method and data processing system for microprocessor communication in a cluster-based multi-processor system Grant 7,818,364 - Arimilli , et al. October 19, 2	2010-10-19
Cache coherent I/O communication Grant 7,783,842 - Arimilli , et al. August 24, 2	2010-08-24
Method and data processing system for processor-to-processor communication in a clustered multi-processor system Grant 7,734,877 - Arimilli , et al. June 8, 2	2010-06-08
Method, processing unit and data processing system for microprocessor communication in a multi-processor system Grant 7,698,373 - Arimilli , et al. April 13, 2	2010-04-13
Information Handling System Including A Multiple Compute Element Processor With Distributed Data On-Ramp Data-Off Ramp Topology App 20090327651 - Cargnoni; Robert Alan ; et al.	2009-12-31
Enhanced Processor Virtualization Mechanism Via Saving and Restoring Soft Processor/System States App 20090157945 - Arimilli; Ravi Kumar ; et al.	2009-06-18
Enhanced processor virtualization mechanism via saving and restoring soft processor/system states Grant 7,493,478 - Arimilli , et al. February 17, 2	2009-02-17
Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system Grant 7,493,417 - Arimilli , et al. February 17, 2	2009-02-17
Method And Data Processing System For Processor-to-processor Communication In A Clustered Multi-processor System App 20080155231 - Arimilli; Ravi Kumar ; et al.	2008-06-26
Method, Processing Unit And Data Processing System For Microprocessor Communication In A Multi-processor System App 20080109816 - ARIMILLI; RAVI KUMAR ; et al.	2008-05-08
Method And Data Processing System For Microprocessor Communication In A Cluster-based Multi-processor System App 20080091918 - Arimilli; Ravi Kumar ; et al.	2008-04-17
Method and data processing system for microprocessor communication in a cluster-based multi-processor system Grant 7,359,932 - Arimilli , et al. April 15, 2	2008-04-15
Method and data processing system for microprocessor communication in a cluster-based multi-processor wireless network Grant 7,360,067 - Arimilli , et al. April 15, 2	2008-04-15
Method, processing unit and data processing system for microprocessor communication in a multi-processor system Grant 7,356,568 - Arimilli , et al. April 8, 2	2008-04-08
Method, system, and program for transferring data directed to virtual memory addresses to a device memory Grant 7,305,526 - Benhase , et al. December 4, 2	2007-12-04
Cross partition sharing of state information Grant 7,272,664 - Arimilli , et al. September 18, 2	2007-09-18
Cache directory array recovery mechanism to support special ECC stuck bit matrix Grant 7,272,773 - Cargnoni , et al. September 18, 2	2007-09-18
Managing processor architected state upon an interrupt Grant 7,117,319 - Arimilli , et al. October 3, 2	2006-10-03
Cache allocation mechanism for biasing subsequent allocations based upon cache directory state Grant 7,103,721 - Cargnoni , et al. September 5, 2	2006-09-05
System and method to stall dispatch of gathered store operations in a store queue using a timer Grant 7,089,364 - Arimilli , et al. August 8, 2	2006-08-08
Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanism Grant 7,069,494 - Cargnoni , et al. June 27, 2	2006-06-27
Integrated purge store mechanism to flush L2/L3 cache structure for improved reliabity and serviceability Grant 7,055,002 - Cargnoni , et al. May 30, 2	2006-05-30
Data cache scrub mechanism for large L2/L3 data cache structures Grant 7,055,003 - Cargnoni , et al. May 30, 2	2006-05-30
Data processing system providing hardware acceleration of input/output (I/O) communication Grant 7,047,320 - Arimilli , et al. May 16, 2	2006-05-16
Method, system, and program for transferring data directed to virtual memory addresses to a device memory App 20060101226 - Benhase; Michael Thomas ; et al.	2006-05-11
Robust system reliability via systolic manufacturing level chip test operating real time on microprocessors/systems Grant 7,039,832 - Arimilli , et al. May 2, 2	2006-05-02
Cache allocation mechanism for saving multiple elected unworthy members via substitute victimization and imputed worthiness of multiple substitute victim members Grant 6,996,679 - Cargnoni , et al. February 7, 2	2006-02-07
Dynamically managing saved processor soft states Grant 6,983,347 - Arimilli , et al. January 3, 2	2006-01-03
Processor virtualization mechanism via an enhanced restoration of hard architected states Grant 6,981,083 - Arimilli , et al. December 27, 2	2005-12-27
Acceleration of input/output (I/O) communication through improved address translation Grant 6,976,148 - Arimilli , et al. December 13, 2	2005-12-13
Method to stall store operations to increase chances of gathering full entries for updating cachelines App 20050251622 - Arimilli, Ravi Kumar ; et al.	2005-11-10
Method and system for managing distributed arbitration for multicycle data transfer requests Grant 6,950,892 - Bell, Jr. , et al. September 27, 2	2005-09-27
Cache allocation mechanism for biasing subsequent allocations based upon cache directory state App 20040215890 - Cargnoni, Robert Alan ; et al.	2004-10-28
Integrated purge store mechanism to flush L2/L3 cache structure for improved reliabity and serviceability App 20040215885 - Cargnoni, Robert Alan ; et al.	2004-10-28
Cache allocation mechanism for saving multiple elected unworthy members via substitute victimization and imputed worthiness of multiple substitute victim members App 20040215889 - Cargnoni, Robert Alan ; et al.	2004-10-28
Data cache scrub mechanism for large L2/L3 data cache structures App 20040215886 - Cargnoni, Robert Alan ; et al.	2004-10-28
Cache directory array recovery mechanism to support special ECC stuck bit matrix App 20040210799 - Cargnoni, Robert Alan ; et al.	2004-10-21
Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanism App 20040210814 - Cargnoni, Robert Alan ; et al.	2004-10-21
Method and system for managing distributed arbitration for multicycle data transfer requests App 20040205275 - Bell, Robert H. JR. ; et al.	2004-10-14
Cache coherent I/O communication App 20040139283 - Arimilli, Ravi Kumar ; et al.	2004-07-15
High speed virtual instruction execution mechanism App 20040139304 - Arimilli, Ravi Kumar ; et al.	2004-07-15
Hardware-enabled instruction tracing App 20040139305 - Arimilli, Ravi Kumar ; et al.	2004-07-15
Acceleration of input/output (I/O) communication through improved address translation App 20040139295 - Arimilli, Ravi Kumar ; et al.	2004-07-15
Data processing system providing hardware acceleration of input/outpuit (I/O) communication App 20040139246 - Arimilli, Ravi Kumar ; et al.	2004-07-15
Method and data processing system for microprocessor communication in a cluster-based multi-processor wireless network App 20040117598 - Arimilli, Ravi Kumar ; et al.	2004-06-17
Method and data processing system for microprocessor communication in a cluster-based multi-processor system App 20040117511 - Arimilli, Ravi Kumar ; et al.	2004-06-17
Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system App 20040117510 - Arimilli, Ravi Kumar ; et al.	2004-06-17
Method, processing unit and data processing system for microprocessor communication in a multi-processor system App 20040117603 - Arimilli, Ravi Kumar ; et al.	2004-06-17
Dynamically managing saved processor soft states App 20040111562 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Processor virtualization mechanism via an enhanced restoration of hard architected states App 20040111548 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Interrupt handler prediction method and system App 20040111593 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Managing processor architected state upon an interrupt App 20040111572 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Robust system reliability via systolic manufacturing level chip test operating real time on microprocessors/ systems App 20040111653 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Cross partition sharing of state information App 20040111552 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Enhanced processor virtualization mechanism via saving and restoring soft processor/system states App 20040111591 - Arimilli, Ravi Kumar ; et al.	2004-06-10
Microprocessor reservation mechanism for a hashed address system Grant 6,748,501 - Arimilli , et al. June 8, 2	2004-06-08
Method and system for controlling information flow between a producer and a buffer in a high frequency digital system Grant 6,606,666 - Bell, Jr. , et al. August 12, 2	2003-08-12
Method and system for controlling information flow in a high frequency digital system from a producer to a buffering consumer via an intermediate buffer and a shared data path Grant 6,604,145 - Bell, Jr. , et al. August 5, 2	2003-08-05
Method and system for controlling information flow between a producer and multiple buffers in a high frequency digital system Grant 6,601,105 - Bell, Jr. , et al. July 29, 2	2003-07-29
Method and system for controlling information flow in a high frequency digital system from a producer to a buffering consumer via an intermediate buffer Grant 6,598,086 - Bell, Jr. , et al. July 22, 2	2003-07-22
Microprocessor reservation mechanism for a hashed address system App 20020087815 - Arimilli, Ravi Kumar ; et al.	2002-07-04
High performance implementation of the load reserve instruction in a superscalar microprocessor that supports multi-level cache organizations Grant 5,835,946 - Allen , et al. November 10, 1	1998-11-10

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