name:-0.0053658485412598
name:-0.011941909790039
name:-0.00060486793518066
Cargnoni; Robert A. Patent Filings

Cargnoni; Robert A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cargnoni; Robert A..The latest application filed is for "selective posted data error detection based on request type".

Company Profile
0.14.5
  • Cargnoni; Robert A. - Austin TX
  • Cargnoni; Robert A. - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
Selective posted data error detection based on request type
Grant 9,058,178 - Cargnoni , et al. June 16, 2
2015-06-16
Selective posted data error detection based on request type
Grant 8,990,640 - Cargnoni , et al. March 24, 2
2015-03-24
Selective Posted Data Error Detection Based On Request Type
App 20140143613 - CARGNONI; ROBERT A. ;   et al.
2014-05-22
Selective Posted Data Error Detection Based On Request Type
App 20140143611 - CARGNONI; ROBERT A. ;   et al.
2014-05-22
Load request scheduling in a cache hierarchy
Grant 8,521,982 - Cargnoni , et al. August 27, 2
2013-08-27
Empirically based dynamic control of transmission of victim cache lateral castouts
Grant 8,347,036 - Cargnoni , et al. January 1, 2
2013-01-01
Virtual barrier synchronization cache
Grant 8,131,935 - Arimilli , et al. March 6, 2
2012-03-06
Empirically Based Dynamic Control of Transmission of Victim Cache Lateral Castouts
App 20100262778 - Cargnoni; Robert A. ;   et al.
2010-10-14
Virtual Barrier Synchronization Cache
App 20100257317 - Arimilli; Ravi K. ;   et al.
2010-10-07
Data processing system, processor and method of data processing that reduce store queue entry utilization for synchronizing operations
Grant 7,454,580 - Arimilli , et al. November 18, 2
2008-11-18
Data Processing System, Processor And Method Of Data Processing That Reduce Store Queue Entry Utilization For Synchronizing Operations
App 20070250669 - Arimilli; Ravi K. ;   et al.
2007-10-25
Method and apparatus for debugging an integrated circuit
Grant 6,499,123 - McFarland , et al. December 24, 2
2002-12-24
Method and apparatus for executing string instructions
Grant 6,212,629 - McFarland , et al. April 3, 2
2001-04-03
Semi-autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for speculative and out-of-order execution of complex instructions
Grant 5,781,753 - McFarland , et al. July 14, 1
1998-07-14
Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions
Grant 5,768,575 - McFarland , et al. June 16, 1
1998-06-16
Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
Grant 5,682,492 - McFarland , et al. October 28, 1
1997-10-28
Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
Grant 5,442,757 - McFarland , et al. * August 15, 1
1995-08-15
Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags
Grant 5,226,126 - McFarland , et al. July 6, 1
1993-07-06

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