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Shallow trench isolation for a memory
Grant 8,963,220 - Grossi , et al. February 24, 2 | 2015-02-24 |
Shallow trench isolation for a memory
Grant 8,664,702 - Grossi , et al. March 4, 2 | 2014-03-04 |
Shallow Trench Isolation For A Memory
App 20140027834 - Grossi; Alessandro ; et al. | 2014-01-30 |
Shallow Trench Isolation For A Memory
App 20120080738 - Grossi; Alessandro ; et al. | 2012-04-05 |
Shallow trench isolation for a memory
Grant 8,097,506 - Grossi , et al. January 17, 2 | 2012-01-17 |
Shallow Trench Isolation For A Memory
App 20100155804 - Grossi; Alessandro ; et al. | 2010-06-24 |
Process For Manufacturing An Array Of Cells Including Selection Bipolar Junction Transistors With Projecting Conduction Regions
App 20090014709 - Pellizzer; Fabio ; et al. | 2009-01-15 |
Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architecture
Grant 7,304,485 - Cappelletti , et al. December 4, 2 | 2007-12-04 |
Magnetic memory cell with plural read transistors
Grant 7,012,832 - Sin , et al. March 14, 2 | 2006-03-14 |
Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method
Grant 6,903,995 - Camerlenghi , et al. June 7, 2 | 2005-06-07 |
Electrically erasable and programmable non-volatile memory cell
Grant 6,876,033 - Cappelletti , et al. April 5, 2 | 2005-04-05 |
Method of making floating gate non-volatile memory cell with low erasing voltage having double layer gate dielectric
Grant 6,841,445 - Cappelletti January 11, 2 | 2005-01-11 |
Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architecture
App 20040268275 - Cappelletti, Paolo ; et al. | 2004-12-30 |
Method of making floating gate non-volatile memory cell with low erasing voltage having double layer gate dielectric
App 20040173840 - Cappelletti, Paolo | 2004-09-09 |
Electrically erasable and programmable non-volatile memory cell
App 20040061168 - Cappelletti, Paolo ; et al. | 2004-04-01 |
Method of making floating gate non-volatile memory cell with low erasing voltage having double layer gate dielectric
Grant 6,710,394 - Cappelletti March 23, 2 | 2004-03-23 |
Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method
App 20030235097 - Camerlenghi, Emilio ; et al. | 2003-12-25 |
Non-volatile memory cell with a single level of polysilicon, in particular of the flash EEPROM type, and method for manufacturing the same
Grant 6,410,389 - Cappelletti , et al. June 25, 2 | 2002-06-25 |
Semiconductor memory
App 20020041534 - Gastaldi, Roberto ; et al. | 2002-04-11 |
Controlled hot-electron writing method for non-volatile memory cells
Grant 6,172,908 - Cappelletti , et al. January 9, 2 | 2001-01-09 |
Device and a method for storing data and corresponding error-correction information
Grant 5,942,004 - Cappelletti August 24, 1 | 1999-08-24 |
FLASH-EPROM with embedded EEPROM
Grant 5,850,092 - Cappelletti December 15, 1 | 1998-12-15 |
Byte erasable EEPROM fully compatible with a single power supply flash-EPROM process
Grant 5,612,913 - Cappelletti , et al. March 18, 1 | 1997-03-18 |
Process for the manufacture of a component to limit the programming voltage and to stabilize the voltage incorporated in an electric device with EEPROM memory cells
Grant 5,322,803 - Cappelletti , et al. June 21, 1 | 1994-06-21 |
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