loadpatents
name:-0.017973899841309
name:-0.016874074935913
name:-0.0012519359588623
Campidelli; Yves Patent Filings

Campidelli; Yves

Patent Applications and Registrations

Patent applications and USPTO patent grants for Campidelli; Yves.The latest application filed is for "method for fabricating nmos and pmos transistors on a substrate of the soi, in particular fdsoi, type and corresponding integrated circuit".

Company Profile
0.18.15
  • Campidelli; Yves - Le Moutaret FR
  • Campidelli; Yves - Lemoutaret FR
  • Campidelli; Yves - Grenoble FR
  • Campidelli; Yves - 38000 Grenoble FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Cyclic epitaxy process to form air gap isolation for a bipolar transistor
Grant 10,186,605 - Gauthier , et al. Ja
2019-01-22
Method For Fabricating Nmos And Pmos Transistors On A Substrate Of The Soi, In Particular Fdsoi, Type And Corresponding Integrated Circuit
App 20150108576 - BARGE; David ;   et al.
2015-04-23
Process for producing at least one deep trench isolation
Grant 8,975,154 - Dutartre , et al. March 10, 2
2015-03-10
Method for depositing a silicon oxide layer of same thickness on silicon and on silicon-germanium
Grant 8,603,887 - Dutartre , et al. December 10, 2
2013-12-10
Process For Producing At Least One Deep Trench Isolation
App 20130095636 - Dutartre; Didier ;   et al.
2013-04-18
Method For Depositing A Silicon Oxide Layer Of Same Thickness On Silicon And On Silicon-germanium
App 20130072032 - Dutartre; Didier ;   et al.
2013-03-21
Process For Forming An Epitaxial Layer, In Particular On The Source And Drain Regions Of Fully-depleted Transistors
App 20120252174 - Dutartre; Didier ;   et al.
2012-10-04
Single-crystal semiconductor layer with heteroatomic macro-network
Grant 8,263,965 - Campidelli , et al. September 11, 2
2012-09-11
Method for manufacturing a structure of semiconductor-on-insulator type
Grant 8,178,426 - Halimaoui , et al. May 15, 2
2012-05-15
Single-crystal Semiconductor Layer With Heteroatomic Macro-network
App 20110108801 - Bensahel; Daniel ;   et al.
2011-05-12
Single-crystal semiconductor layer with heteroatomic macronetwork
Grant 7,884,352 - Bensahel , et al. February 8, 2
2011-02-08
Electronic component manufacturing method
Grant 7,879,679 - Kermarrec , et al. February 1, 2
2011-02-01
Single-crystal layer on a dielectric layer
Grant 7,749,817 - Kermarec , et al. July 6, 2
2010-07-06
Single-crystal layer on a dielectric layer
Grant 7,547,914 - Kermarec , et al. June 16, 2
2009-06-16
Electronic Component Manufacturing Method
App 20080239625 - Kermarrec; Oliver ;   et al.
2008-10-02
Method For Manufacturing A Structure Of Semiconductor-on-insulator Type
App 20080197447 - Halimaoui; Aomar ;   et al.
2008-08-21
Heteroatomic single-crystal layers
Grant 7,381,267 - Bensahel , et al. June 3, 2
2008-06-03
Single-crystal layer on a dielectric layer
App 20070278494 - Kermarec; Olivier ;   et al.
2007-12-06
Single-Crystal Semiconductor Layer with Heteroatomic Macronetwork
App 20070248818 - Bensahel; Daniel ;   et al.
2007-10-25
Single-crystal layer on a dielectric layer
App 20070228384 - Kermarec; Olivier ;   et al.
2007-10-04
Method of fabricating a semiconductor device comprising a gate dielectric made of high dielectric permittivity material
Grant 7,129,563 - Cosnier , et al. October 31, 2
2006-10-31
Method of fabricating a semiconductor device comprising a gate dielectric made of high dielectric permittivity material
App 20040256699 - Cosnier, Vincent ;   et al.
2004-12-23
Heteroatomic single-crystal layers
App 20040250752 - Bensahel, Daniel ;   et al.
2004-12-16
Method for making a device comprising layers of planes of quantum dots
Grant 6,690,027 - Bensahel , et al. February 10, 2
2004-02-10
Method of cleaning a semiconductor process chamber
App 20030221708 - Ly, Chun-Hao ;   et al.
2003-12-04
Forming of quantum dots
Grant 6,596,555 - Bensahel , et al. July 22, 2
2003-07-22
Process for obtaining a layer of single-crystal germanium on a substrate of single-crystal silicon, and products obtained
Grant 6,537,370 - Hernandez , et al. March 25, 2
2003-03-25
Process for obtaining a layer of single-crystal germanium or silicon on a substrate of single-crystal silicon or germanium, respectively, and multilayer products obtained
Grant 6,429,098 - Bensahel , et al. August 6, 2
2002-08-06
Forming of quantum dots
App 20020039833 - Bensahel, Daniel ;   et al.
2002-04-04
Process for obtaining a layer of single-crystal germanium or silicon on a substrate of single-crystal silicon or germanium, respectively
Grant 6,117,750 - Bensahel , et al. September 12, 2
2000-09-12
Process and apparatus for the growth of films of silicides of refractory metals and films obtained by this process
Grant 4,643,914 - Arnaud D'Avitaya , et al. February 17, 1
1987-02-17

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