Campbell, Jr.; Jules D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Campbell, Jr.; Jules D..The latest application filed is for "frequency modulated output clock from a digital frequency/phase locked loop".

Company Profile

0.15.0

Campbell, Jr.; Jules D. - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Frequency modulated output clock from a digital frequency/phase locked loop Grant 7,482,880 - Herrin , et al. January 27, 2	2009-01-27
Frequency modulated output clock from a digital phase locked loop Grant 7,420,426 - Herrin , et al. September 2, 2	2008-09-02
Method and apparatus for measuring gate leakage current in an integrated circuit Grant 6,348,806 - Okandan , et al. February 19, 2	2002-02-19
Method and circuit for testing an analog-to-digital converter module on a data processing system having an intermodule bus Grant 6,297,757 - Campbell, Jr. , et al. October 2, 2	2001-10-02
High reliability output buffer for multiple voltage system Grant 5,646,550 - Campbell, Jr. , et al. July 8, 1	1997-07-08
Current mode transmitter and receiver for reduced RFI Grant 5,504,782 - Campbell, Jr. April 2, 1	1996-04-02
Charge-balanced switched-capacitor circuit and amplifier circuit using same Grant 5,359,294 - Ganger , et al. October 25, 1	1994-10-25
Automatic A/D converter operation with pause capability Grant 5,302,952 - Campbell, Jr. , et al. April 12, 1	1994-04-12
Method and apparatus for testing an analog to digital converter Grant 5,175,547 - Lyon , et al. December 29, 1	1992-12-29
Automatic A/D converter operation using a programmable control table Grant 5,168,276 - Huston , et al. December 1, 1	1992-12-01
Automatic selection of external multiplexer channels by an A/D converter integrated circuit Grant 5,166,685 - Campbell, Jr. , et al. November 24, 1	1992-11-24
Automatic A/D converter operation using programmable sample time Grant 5,081,454 - Campbell, Jr. , et al. January 14, 1	1992-01-14
Power-on-reset circuit having a differential comparator with intrinsic offset voltage Grant 4,634,905 - Campbell, Jr. January 6, 1	1987-01-06
Digital to analog converter circuit Grant 4,517,551 - Campbell, Jr. May 14, 1	1985-05-14
Single input oscillator circuit Grant 4,513,258 - Jamiolkowski , et al. April 23, 1	1985-04-23

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