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Methods of forming microelectronic devices and memory devices, and related microelectronic devices, memory devices, and electronic systems
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Apparatus for determining a pass voltage of a read operation
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Integrated Assemblies, and Methods of Forming Integrated Assemblies
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Methods Of Forming Microelectronic Devices And Memory Devices, And Related Microelectronic Devices, Memory Devices, And Electronic Systems
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Memory Arrays Comprising Operative Channel-Material Strings And Dummy Pillars
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Methods used in forming a memory array comprising strings of memory cells
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Erasing Memory
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Apparatus For Determining A Pass Voltage Of A Read Operation
App 20210202020 - Moschiano; Violante ; et al. | 2021-07-01 |
Erasing memory
Grant 11,011,236 - Paolucci , et al. May 18, 2 | 2021-05-18 |
Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells
App 20210125919 - Machkaoutsan; Vladimir ; et al. | 2021-04-29 |
Apparatus for determining a pass voltage of a read operation
Grant 10,950,316 - Moschiano , et al. March 16, 2 | 2021-03-16 |
Erasing Memory
App 20210065810 - Paolucci; Giovanni Maria ; et al. | 2021-03-04 |
Apparatus For Determining A Pass Voltage Of A Read Operation
App 20200372961 - Moschiano; Violante ; et al. | 2020-11-26 |
Apparatus and methods for determining data states of memory cells
Grant 10,777,286 - Moschiano , et al. Sept | 2020-09-15 |
Memory arrays and methods used in forming a memory array
Grant 10,756,105 - Fukuzumi , et al. A | 2020-08-25 |
Apparatus And Methods For Determining Data States Of Memory Cells
App 20200211660 - Moschiano; Violante ; et al. | 2020-07-02 |
Memory Arrays And Methods Used In Forming A Memory Array
App 20200168622 - Fukuzumi; Yoshiaki ; et al. | 2020-05-28 |
Methods of forming memory arrays
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Methods of Forming Memory Arrays
App 20150311115 - Righetti; Niccolo' ; et al. | 2015-10-29 |
Non-volatile memory
Grant 8,211,762 - Camerlenghi , et al. July 3, 2 | 2012-07-03 |
Reference cell layout with enhanced RTN immunity
Grant 7,551,465 - Ghilardi , et al. June 23, 2 | 2009-06-23 |
Reference Cell Layout With Enhanced Rtn Immunity
App 20080266929 - Ghilardi; Tecla ; et al. | 2008-10-30 |
Method for manufacturing non volatile memory cells integrated on a semiconductor substrate
App 20070202647 - Mariani; Marcello ; et al. | 2007-08-30 |
Sealing Method For Electronic Devices Formed On A Common Semiconductor Substrate And Corresponding Circuit Structure
App 20070026610 - Camerlenghi; Emilio ; et al. | 2007-02-01 |
Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure
Grant 7,078,294 - Camerlenghi , et al. July 18, 2 | 2006-07-18 |
Single cell erasing method for recovering memory cells under programming disturbs in non volatile semiconductor memory devices
Grant 6,944,061 - Camerlenghi , et al. September 13, 2 | 2005-09-13 |
Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method
Grant 6,903,995 - Camerlenghi , et al. June 7, 2 | 2005-06-07 |
Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure
App 20050112905 - Camerlenghi, Emilio ; et al. | 2005-05-26 |
Single cell erasing method for recovering memory cells under programming disturbs in non volatile semiconductor memory devices
App 20040233730 - Camerlenghi, Emilio ; et al. | 2004-11-25 |
Non-volatile memory cell with floating gate region autoaligned to the isolation and with a high coupling coefficient
Grant 6,750,505 - Bez , et al. June 15, 2 | 2004-06-15 |
Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method
App 20030235097 - Camerlenghi, Emilio ; et al. | 2003-12-25 |
Process for manufacturing a non-volatile memory cell with a floating gate region autoaligned to the isolation and with a high coupling coefficient
App 20030096477 - Bez, Roberto ; et al. | 2003-05-22 |
Manufacturing process for non-volatile floating gate memory cells integrated on a semiconductor substrate and comprised in a cell matrix with an associated control circuitry
Grant 6,420,223 - Camerlenghi July 16, 2 | 2002-07-16 |
Autoaligned etching process for realizing word lines in memory devices integrated semiconductor substrates
Grant 6,380,582 - Camerlenghi , et al. April 30, 2 | 2002-04-30 |
Process for manufacturing a non-volatile memory cell with a floating gate region autoaligned to the isolation and with a high coupling coefficient
App 20020025631 - Bez, Roberto ; et al. | 2002-02-28 |
Manufacturing process for non-volatile floating gate memory cells integrated on a semiconductor substrate and comprised in a cell matrix with an associated control circuitry
App 20010016390 - Camerlenghi, Emilio | 2001-08-23 |
Method and a circuit for improving the effectiveness of ESD protection in circuit structures formed in a semiconductor
App 20010011751 - Colombo, Paolo ; et al. | 2001-08-09 |
Method and a circuit for improving the effectiveness of ESD protection in circuit structures formed in a semiconductor
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Voltage regulator for non-volatile semiconductor electrically programmable memory devices
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Failure tolerant memory device, in particular of the flash EEPROM type
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Voltage regulator for non-volatile semiconductor memory devices
Grant 5,576,990 - Camerlenghi , et al. November 19, 1 | 1996-11-19 |
Method of making non-volatile split gate EPROM memory cell and self-aligned field insulation
Grant 5,330,938 - Camerlenghi July 19, 1 | 1994-07-19 |
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