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name:-0.0070340633392334
name:-0.00052595138549805
Camalleri; Marco Patent Filings

Camalleri; Marco

Patent Applications and Registrations

Patent applications and USPTO patent grants for Camalleri; Marco.The latest application filed is for "method for manufacturing a high integration density power mos device".

Company Profile
0.5.5
  • Camalleri; Marco - Catania IT
  • Camalleri; Marco - Palermo IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for manufacturing a high integration density power MOS device
Grant 8,013,384 - Arena , et al. September 6, 2
2011-09-06
Method For Manufacturing A High Integration Density Power Mos Device
App 20090321826 - ARENA; Giuseppe ;   et al.
2009-12-31
Method for manufacturing a high integration density power MOS device
Grant 7,601,610 - Arena , et al. October 13, 2
2009-10-13
Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performance and high scaling down density
Grant 7,304,335 - Magri' , et al. December 4, 2
2007-12-04
Vertical-conduction And Planar-structure Mos Device With A Double Thickness Of Gate Oxide And Method For Realizing Power Vertical Mos Transistors With Improved Static And Dynamic Performance And High Scaling Down Density
App 20060186434 - MAGRI'; Angelo ;   et al.
2006-08-24
Method for manufacturing a high integration density power MOS device
App 20060138537 - Arena; Giuseppe ;   et al.
2006-06-29
Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performances and high scaling down density
Grant 7,067,363 - Magri' , et al. June 27, 2
2006-06-27
Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performances and high scaling down density
App 20050139906 - Magri', Angelo ;   et al.
2005-06-30
Method for manufacturing a SOI wafer
Grant 6,506,658 - D'Arrigo , et al. January 14, 2
2003-01-14
Method for manufacturing a SOI wafer
App 20010023094 - D'Arrigo, Giuseppe ;   et al.
2001-09-20

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