loadpatents
name:-0.00907301902771
name:-0.011140108108521
name:-0.00075387954711914
Cabezas; Rafael G. Patent Filings

Cabezas; Rafael G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Cabezas; Rafael G..The latest application filed is for "non-disruptive i/o adapter diagnostic testing".

Company Profile
0.8.6
  • Cabezas; Rafael G. - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for device driver state storage during diagnostic phase
Grant 9,298,568 - Cabezas , et al. March 29, 2
2016-03-29
Non-disruptive I/O adapter diagnostic testing
Grant 8,347,142 - Cabezas , et al. January 1, 2
2013-01-01
Non-disruptive I/O adapter diagnostic testing
Grant 8,006,133 - Cabezas , et al. August 23, 2
2011-08-23
Non-disruptive I/o Adapter Diagnostic Testing
App 20110167293 - CABEZAS; RAFAEL G. ;   et al.
2011-07-07
Method And Apparatus For Device Driver State Storage During Diagnostic Phase
App 20090276793 - Cabezas; Rafael G. ;   et al.
2009-11-05
Method, System And Program Product For Non-disruptive I/o Adapter Diagnostic Testing
App 20090210751 - Cabezas; Rafael G. ;   et al.
2009-08-20
Method and apparatus for supplying power to a bus-controlled component of a computer
Grant 7,085,939 - Cabezas , et al. August 1, 2
2006-08-01
Unified diagnostics platform system and method for evaluating computer products
Grant 6,980,947 - Cabezas , et al. December 27, 2
2005-12-27
Method and apparatus for enhanced power consumption handling of bus-controlled components
App 20040210777 - Cabezas, Rafael G. ;   et al.
2004-10-21
Method for testing a computer bus using a bridge chip having a freeze-on-error option
Grant 6,745,345 - Cabezas , et al. June 1, 2
2004-06-01
Unified diagnostics platform system and method for evaluating computer products
App 20030014618 - Cabezas, Rafael G. ;   et al.
2003-01-16
Method for testing a computer bus using a bridge chip having a freeze-on-error option
App 20020095624 - Cabezas, Rafael G. ;   et al.
2002-07-18
Method and system for verification of the baud rate for an asynchronous serial device residing within a data processing system
Grant 5,612,961 - Cabezas , et al. March 18, 1
1997-03-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed