Burnley; Richard P.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Burnley; Richard P..The latest application filed is for "method and apparatus for evaluating paths in an integrated circuit design".

Company Profile

0.20.0

Burnley; Richard P. - Mountain View CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for evaluating paths in an integrated circuit design Grant 8,079,002 - Lo , et al. December 13, 2	2011-12-13
Network media access controller embedded in a programmable device--receive-side client interface Grant 7,991,937 - Yin , et al. August 2, 2	2011-08-02
Embedded network media access controller Grant 7,934,038 - Kao , et al. April 26, 2	2011-04-26
Network media access controller embedded in an integrated circuit host interface Grant 7,761,643 - Yin , et al. July 20, 2	2010-07-20
Network media access controller embedded in a programmable logic device--transmit-side client interface Grant 7,493,511 - Yin , et al. February 17, 2	2009-02-17
Network media access controller embedded in a programmable logic device--host interface Grant 7,484,022 - Yin , et al. January 27, 2	2009-01-27
Ethernet media access controller embedded in a programmable logic device--clock interface Grant 7,467,319 - Kao , et al. December 16, 2	2008-12-16
Network media access controller embedded in a programmable logic device--receive-side client interface Grant 7,461,193 - Yin , et al. December 2, 2	2008-12-02
Network media access controller embedded in a programmable logic device--address filter Grant 7,421,528 - Yin , et al. September 2, 2	2008-09-02
Method and apparatus for timing modeling Grant 7,379,855 - Oda , et al. May 27, 2	2008-05-27
Network media access controller embedded in a programmable logic device--host interface control generator Grant 7,376,774 - Yin , et al. May 20, 2	2008-05-20
Network media access controller embedded in a programmable logic device--statistics interface Grant 7,366,807 - Yin , et al. April 29, 2	2008-04-29
Network media access controller embedded in a programmable logic device--physical layer interface Grant 7,330,924 - Kao , et al. February 12, 2	2008-02-12
Timing performance analysis Grant 7,254,794 - Burnley August 7, 2	2007-08-07
Network media access controller embedded in a programmable logic device-address filter Grant 7,143,218 - Yin , et al. November 28, 2	2006-11-28
Method and apparatus for timing modeling Grant 7,092,865 - Burnley , et al. August 15, 2	2006-08-15
Timing performance analysis Grant 6,934,922 - Burnley August 23, 2	2005-08-23
Buffered asynchronous communications elements with receive/transmit control and status reporting Grant 5,287,458 - Michael , et al. * February 15, 1	1994-02-15
Buffered asynchronous communications element with receive/transmit control and status reporting Grant 5,241,660 - Michael , et al. * August 31, 1	1993-08-31
Asynchronous communications element Grant 4,823,312 - Michael , et al. April 18, 1	1989-04-18

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