Burnette, II; James E.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Burnette, II; James E..The latest application filed is for "selectable phase or cycle jitter detector".
- Burnette, II; James E. - San Jose CA
- Burnette, II; James E - San Jose CA
| Patent | Date |
|---|---|
| Selectable phase or cycle jitter detector Grant 9,389,635 - Hess , et al. July 12, 2 | 2016-07-12 |
| Selectable Phase Or Cycle Jitter Detector App 20160062388 - Hess; Greg M. ; et al. | 2016-03-03 |
| Register file write ring oscillator Grant 9,230,690 - Hess , et al. January 5, 2 | 2016-01-05 |
| Selectable phase or cycle jitter detector Grant 9,207,705 - Hess , et al. December 8, 2 | 2015-12-08 |
| Sense amplifier soft-fail detection circuit Grant 8,988,957 - Hess , et al. March 24, 2 | 2015-03-24 |
| Selectable Phase Or Cycle Jitter Detector App 20140129868 - Hess; Greg M ; et al. | 2014-05-08 |
| Register File Write Ring Oscillator App 20140129884 - Hess; Greg M. ; et al. | 2014-05-08 |
| Sense Amplifier Soft-fail Detection Circuit App 20140126312 - Hess; Greg M. ; et al. | 2014-05-08 |
| Multiplexer with level shifter Grant 8,558,603 - Hess , et al. October 15, 2 | 2013-10-15 |
| Multiplexer with Level Shifter App 20130154712 - Hess; Greg M. ; et al. | 2013-06-20 |
| Versatile method and tool for simulation of aged transistors Grant 8,397,199 - Soni , et al. March 12, 2 | 2013-03-12 |
| Versatile Method and Tool for Simulation of Aged Transistors App 20110257954 - Soni; Apurva H. ; et al. | 2011-10-20 |
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