loadpatents
name:-0.0086960792541504
name:-0.0088510513305664
name:-0.00046300888061523
Burghout; William F. Patent Filings

Burghout; William F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Burghout; William F..The latest application filed is for "semiconductor die singulation method".

Company Profile
0.8.8
  • Burghout; William F. - Mesa AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor die singulation method
Grant 9,847,219 - Burghout , et al. December 19, 2
2017-12-19
Semiconductor Die Singulation Method
App 20170004965 - BURGHOUT; William F. ;   et al.
2017-01-05
Semiconductor die singulation method
Grant 9,484,210 - Burghout , et al. November 1, 2
2016-11-01
Semiconductor Die Singulation Method
App 20150228494 - Burghout; William F. ;   et al.
2015-08-13
Semiconductor die singulation method
Grant 9,034,733 - Burghout , et al. May 19, 2
2015-05-19
Semiconductor Die Singulation Method
App 20140134828 - Burghout; William F. ;   et al.
2014-05-15
Semiconductor die singulation method
Grant 8,664,089 - Burghout , et al. March 4, 2
2014-03-04
Semiconductor Die Singulation Method
App 20140051232 - Burghout; William F. ;   et al.
2014-02-20
Electronic package having down-set leads and method
Grant 8,319,323 - Letterman, Jr. , et al. November 27, 2
2012-11-27
Method of forming a leaded molded array package
Grant 7,820,528 - Burghout , et al. October 26, 2
2010-10-26
Electronic Package Having Down-set Leads And Method
App 20100000772 - Letterman, JR.; James P. ;   et al.
2010-01-07
Method Of Forming A Leaded Molded Array Package
App 20090298232 - Burghout; William F. ;   et al.
2009-12-03
Method of forming a leaded molded array package
Grant 7,588,999 - Burghout , et al. September 15, 2
2009-09-15
Method of forming a leaded molded array package
App 20070111393 - Burghout; William F. ;   et al.
2007-05-17

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