loadpatents
name:-0.02516508102417
name:-0.013957977294922
name:-0.008540153503418
Bunker; Layne Patent Filings

Bunker; Layne

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bunker; Layne.The latest application filed is for "apparatus and methods for through substrate via test".

Company Profile
2.12.7
  • Bunker; Layne - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatus and methods for through substrate via test
Grant 10,629,502 - Hargan , et al.
2020-04-21
Apparatus And Methods For Through Substrate Via Test
App 20190109057 - Hargan; Ebrahim H. ;   et al.
2019-04-11
Apparatus and methods for through substrate via test
Grant 10,037,926 - Hargan , et al. July 31, 2
2018-07-31
Apparatus And Methods For Through Substrate Via Test
App 20160233136 - Hargan; Ebrahim H. ;   et al.
2016-08-11
Apparatus and methods for through substrate via test
Grant 9,318,394 - Hargan , et al. April 19, 2
2016-04-19
Apparatus And Methods For Through Substrate Via Test
App 20150008953 - Hargan; Ebrahim H. ;   et al.
2015-01-08
Apparatus and methods for through substrate via test
Grant 8,847,619 - Hargan , et al. September 30, 2
2014-09-30
Apparatus And Methods For Through Substrate Via Test
App 20110267092 - Hargan; Ebrahim H. ;   et al.
2011-11-03
Memory malfunction prediction system and method
Grant 8,023,350 - Bunker , et al. September 20, 2
2011-09-20
Apparatus and methods for through substrate via test
Grant 7,977,962 - Hargan , et al. July 12, 2
2011-07-12
Memory Malfunction Prediction System And Method
App 20100271896 - Bunker; Layne ;   et al.
2010-10-28
Memory malfunction prediction system and method
Grant 7,773,441 - Bunker , et al. August 10, 2
2010-08-10
Apparatus And Methods For Through Substrate Via Test
App 20100013512 - Hargan; Ebrahim H. ;   et al.
2010-01-21
Memory Malfunction Prediction System And Method
App 20090316501 - Bunker; Layne ;   et al.
2009-12-24
Memory device having a relatively wide data bus
Grant RE38,955 - Shirley , et al. January 31, 2
2006-01-31
Memory device having a relatively wide data bus
Grant 6,034,900 - Shirley , et al. March 7, 2
2000-03-07
Method for generating input data for an electronic circuit simulator
Grant 5,278,770 - Gore , et al. January 11, 1
1994-01-11

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