Bunce; Paul A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bunce; Paul A..The latest application filed is for "dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation".

Company Profile

4.35.31

Bunce; Paul A. - Poughkeepsie NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation Grant 9,997,218 - Bunce , et al. June 12, 2	2018-06-12
Cache array with reduced power consumption Grant 9,977,485 - Bunce , et al. May 22, 2	2018-05-22
Cache array with reduced power consumption Grant 9,971,394 - Bunce , et al. May 15, 2	2018-05-15
Dual Mode Operation Having Power Saving And Active Modes In A Stacked Circuit Topology With Logic Preservation App 20180005674 - BUNCE; PAUL A. ; et al.	2018-01-04
Managing semiconductor memory array leakage current Grant 9,792,967 - Bunce , et al. October 17, 2	2017-10-17
Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation Grant 9,786,339 - Bunce , et al. October 10, 2	2017-10-10
Managing semiconductor memory array leakage current Grant 9,761,289 - Bunce , et al. September 12, 2	2017-09-12
Dual Mode Operation Having Power Saving And Active Modes In A Stacked Circuit Topology With Logic Preservation App 20170243619 - BUNCE; PAUL A. ; et al.	2017-08-24
Incorporating bit write capability with column interleave write enable and column redundancy steering Grant 9,583,211 - Bunce , et al. February 28, 2	2017-02-28
High frequency write through memory device Grant 9,355,692 - Bunce , et al. May 31, 2	2016-05-31
Write/read priority blocking scheme using parallel static address decode path Grant 9,281,024 - Bunce , et al. March 8, 2	2016-03-08
Write/read priority blocking scheme using parallel static address decode path Grant 9,281,025 - Bunce , et al. March 8, 2	2016-03-08
Write/read Priority Blocking Scheme Using Parallel Static Address Decode Path App 20150302908 - Bunce; Paul A. ; et al.	2015-10-22
Write/read Priority Blocking Scheme Using Parallel Static Address Decode Path App 20150302902 - Bunce; Paul A. ; et al.	2015-10-22
SRAM supply voltage global bitline precharge pulse Grant 9,070,433 - Bunce , et al. June 30, 2	2015-06-30
Cache Array With Reduced Power Consumption App 20150019890 - Bunce; Paul A. ; et al.	2015-01-15
Increasing memory operating frequency Grant 8,861,284 - Bunce , et al. October 14, 2	2014-10-14
High Frequency Memory App 20140078835 - Bunce; Paul A. ; et al.	2014-03-20
Cache Array With Reduced Power Consumption App 20140082390 - Bunce; Paul A. ; et al.	2014-03-20
Increasing Memory Operating Frequency App 20140078833 - Bunce; Paul A. ; et al.	2014-03-20
Port enable signal generation for gating a memory array device output Grant 8,599,642 - Bunce , et al. December 3, 2	2013-12-03
Jam latch for latching memory array output data Grant 8,351,278 - Bunce , et al. January 8, 2	2013-01-08
Split voltage level restore and evaluate clock signals for memory address decoding Grant 8,345,490 - Bunce , et al. January 1, 2	2013-01-01
Internal bypassing of memory array devices Grant 8,345,497 - Bunce , et al. January 1, 2	2013-01-01
Programmable control clock circuit including scan mode Grant 8,299,833 - Bunce , et al. October 30, 2	2012-10-30
Jam Latch For Latching Memory Array Output Data App 20110317496 - Bunce; Paul A. ; et al.	2011-12-29
Split Voltage Level Restore And Evaluate Clock Signals For Memory Address Decoding App 20110317499 - Bunce; Paul A. ; et al.	2011-12-29
Internal Bypassing Of Memory Array Devices App 20110317505 - Bunce; Paul A. ; et al.	2011-12-29
Port Enable Signal Generation For Gating A Memory Array Device Output App 20110320851 - Bunce; Paul A. ; et al.	2011-12-29
Programmable Control Clock Circuit Including Scan Mode App 20110304370 - Bunce; Paul A. ; et al.	2011-12-15
Write control method for a memory array configured with multiple memory subarrays Grant 7,688,650 - Davis , et al. March 30, 2	2010-03-30
Write control circuitry and method for a memory array configured with multiple memory subarrays Grant 7,471,590 - Davis , et al. December 30, 2	2008-12-30
Write Control Method For A Memory Array Configured With Multiple Memory Subarrays App 20080247245 - Davis; John D. ; et al.	2008-10-09
Clock Control Method And Apparatus For A Memory Array App 20080028255 - DAWSON; James W. ; et al.	2008-01-31
Clock control method and apparatus for a memory array Grant 7,299,374 - Dawson , et al. November 20, 2	2007-11-20
Write control circuitry and method for a memory array configured with multiple memory subarrays Grant 7,283,417 - Davis , et al. October 16, 2	2007-10-16
Write Control Circuitry And Method For A Memory Array Configured With Multiple Memory Subarrays App 20070237020 - Davis; John D. ; et al.	2007-10-11
Method for enabling scan of defective ram prior to repair Grant 7,266,737 - Bunce , et al. September 4, 2	2007-09-04
Method and apparatus for address generation Grant 7,233,542 - Bunce , et al. June 19, 2	2007-06-19
Integrated system logic and ABIST data compression for an SRAM directory Grant 7,210,084 - Bunce , et al. April 24, 2	2007-04-24
Method for enabling scan of defective ram prior to repair App 20070033459 - Bunce; Paul A. ; et al.	2007-02-08
Programmable analog control of a bitline evaluation circuit Grant 7,102,944 - Bunce , et al. September 5, 2	2006-09-05
Circuit and method for writing a binary value to a memory cell Grant 7,099,203 - Bunce , et al. August 29, 2	2006-08-29
Programmable analog control of a bitline evaluation circuit App 20060181952 - Bunce; Paul A. ; et al.	2006-08-17
Method and apparatus for address generation App 20060181951 - Bunce; Paul A. ; et al.	2006-08-17
Circuit And Method For Writing A Binary Value To A Memory Cell App 20060181954 - Bunce; Paul A. ; et al.	2006-08-17
Global And Local Read Control Synchronization Method And System For A Memory Array Configured With Multiple Memory Subarrays App 20060176760 - Bunce; Paul A. ; et al.	2006-08-10
Method and circuit for implementing array bypass operations without access penalty App 20060179382 - Bunce; Paul A. ; et al.	2006-08-10
Clocked preconditioning of intermediate nodes App 20060176073 - Chen; Ann H. ; et al.	2006-08-10
Write Driver Circuit For Memory Array App 20060176743 - Bunce; Paul A. ; et al.	2006-08-10
Circuit for interfacing local bitlines with global bitline App 20060176747 - Bunce; Paul A. ; et al.	2006-08-10
Write control circuitry and method for a memory array configured with multiple memory subarrays App 20060176756 - Davis; John D. ; et al.	2006-08-10
Global and local read control synchronization method and system for a memory array configured with multiple memory subarrays Grant 7,088,638 - Bunce , et al. August 8, 2	2006-08-08
Clock control method and apparatus for a memory array App 20060174153 - Dawson; James W. ; et al.	2006-08-03
Write driver circuit for memory array Grant 7,085,173 - Bunce , et al. August 1, 2	2006-08-01
Memory output timing control circuit with merged functions Grant 7,075,855 - Bunce , et al. July 11, 2	2006-07-11
System and method for synchronizing memory array signals Grant 7,023,759 - Bunce , et al. April 4, 2	2006-04-04
Method for skip over redundancy decode with very low overhead Grant 7,009,895 - Bunce , et al. March 7, 2	2006-03-07
Method for skip over redundancy decode with very low overhead App 20050226063 - Bunce, Paul A. ; et al.	2005-10-13
High speed latch and compare function Grant 6,822,885 - Bunce , et al. November 23, 2	2004-11-23
High Speed Latch And Compare Function App 20040202026 - Bunce, Paul A. ; et al.	2004-10-14
Integrated system logic and abist data compression for an SRAM directory App 20040205434 - Bunce, Paul A. ; et al.	2004-10-14
SOI cell stability test method Grant 6,728,912 - Dawson , et al. April 27, 2	2004-04-27
System for implementing a column redundancy scheme for arrays with controls that span multiple data bits Grant 6,584,023 - Bunce , et al. June 24, 2	2003-06-24
SOI cell stability test method App 20020152434 - Dawson, James W. ; et al.	2002-10-17

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