Bulzacchelli; John F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bulzacchelli; John F..The latest application filed is for "transmitter with fully re-assignable segments for reconfigurable ffe taps".

Company Profile

7.60.59

Bulzacchelli; John F. - Somers NY
Bulzacchelli; John F. - Yonkers NY
Bulzacchelli; John F. - Yorktown Heights NY
Bulzacchelli; John F - Yonkers NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Transmitter with fully re-assignable segments for reconfigurable FFE taps Grant 10,924,310 - Toprak-Deniz , et al. February 16, 2	2021-02-16
Dynamic phased array tapering without phase recalibration Grant 10,749,489 - Bulzacchelli , et al. A	2020-08-18
Dynamic phased array tapering without phase recalibration Grant 10,693,429 - Bulzacchelli , et al.	2020-06-23
Transmitter With Fully Re-assignable Segments For Reconfigurable Ffe Taps App 20200084074 - Toprak-Deniz; Zeynep ; et al.	2020-03-12
Dynamic Phased Array Tapering Without Phase Recalibration App 20190214955 - Bulzacchelli; John F. ; et al.	2019-07-11
Dynamic phased array tapering without phase recalibration Grant 10,298,190 - Bulzacchelli , et al.	2019-05-21
Distributed voltage regulation system for mitigating the effects of IR-drop Grant 10,069,409 - Bulzacchelli , et al. September 4, 2	2018-09-04
Dynamic Phased Array Tapering Without Phase Recalibration App 20180212580 - Bulzacchelli; John F. ; et al.	2018-07-26
Dynamic voltage regulation Grant 10,033,270 - Bulzacchelli , et al. July 24, 2	2018-07-24
Dynamic phased array tapering without phase recalibration Grant 10,008,995 - Bulzacchelli , et al. June 26, 2	2018-06-26
Dynamic Voltage Regulation App 20180115238 - Bulzacchelli; John F. ; et al.	2018-04-26
Distributed Voltage Regulation System For Mitigating The Effects Of Ir-drop App 20180076708 - Bulzacchelli; John F. ; et al.	2018-03-15
Circuits and methods for DFE with reduced area and power consumption Grant 9,806,699 - Bulzacchelli , et al. October 31, 2	2017-10-31
Single-flux-quantum probabilistic digitizer Grant 9,793,913 - Bulzacchelli , et al. October 17, 2	2017-10-17
Dynamic Phased Array Tapering Without Phase Recalibration App 20170194924 - Bulzacchelli; John F. ; et al.	2017-07-06
Dynamic Phased Array Tapering Without Phase Recalibration App 20170194707 - Bulzacchelli; John F. ; et al.	2017-07-06
Single-flux-quantum Probabilistic Digitizer App 20170179973 - Bulzacchelli; John F. ; et al.	2017-06-22
Single-flux-quantum probabilistic digitizer Grant 9,614,532 - Bulzacchelli , et al. April 4, 2	2017-04-04
Passgate strength calibration techniques for voltage regulators Grant 9,541,935 - Bulzacchelli , et al. January 10, 2	2017-01-10
Dynamic phased array tapering without phase recalibration Grant 9,531,086 - Bulzacchelli , et al. December 27, 2	2016-12-27
Continuous-time linear equalizer for high-speed receiving unit Grant 9,467,313 - Bulzacchelli , et al. October 11, 2	2016-10-11
Circuits and methods for DFE with reduced area and power consumption Grant 9,444,437 - Bulzacchelli , et al. September 13, 2	2016-09-13
On-chip test for integrated AC coupling capacitors Grant 9,335,370 - Atwood , et al. May 10, 2	2016-05-10
Continuous-time linear equalizer for high-speed receiving unit Grant 9,288,085 - Bulzacchelli , et al. March 15, 2	2016-03-15
Power aware equalization in a serial communications link Grant 9,231,796 - Bulzacchelli , et al. January 5, 2	2016-01-05
Continuous-time Linear Equalizer For High-speed Receiving Unit App 20150312064 - Bulzacchelli; John F. ; et al.	2015-10-29
Continuous-time Linear Equalizer For High-speed Receiving Unit App 20150295736 - Bulzacchelli; John F. ; et al.	2015-10-15
Circuits And Methods For Dfe With Reduced Area And Power Consumption App 20150256160 - BULZACCHELLI; JOHN F. ; et al.	2015-09-10
On-chip Test For Integrated Ac Coupling Capacitors App 20150198647 - Atwood; Eugene ; et al.	2015-07-16
Circuits And Methods For Dfe With Reduced Area And Power Consumption App 20150200792 - Bulzacchelli; John F. ; et al.	2015-07-16
Power Aware Equalization In A Serial Communications Link App 20150146768 - Bulzacchelli; John F. ; et al.	2015-05-28
Passgate Strength Calibration Techniques For Voltage Regulators App 20150123633 - Bulzacchelli; John F. ; et al.	2015-05-07
Circuits and methods for DFE with reduced area and power consumption Grant 9,008,169 - Bulzacchelli , et al. April 14, 2	2015-04-14
Passgate strength calibration techniques for voltage regulators Grant 8,981,829 - Bulzacchelli , et al. March 17, 2	2015-03-17
Passgate Strength Calibration Techniques For Voltage Regulators App 20150061744 - Bulzacchelli; John F. ; et al.	2015-03-05
Digital Control System For Distributed Voltage Regulators App 20150054575 - Bulzacchelli; John F. ; et al.	2015-02-26
Digital Control System For Distributed Voltage Regulators App 20150054574 - Bulzacchelli; John F. ; et al.	2015-02-26
Time domain analog multiplication techniques for adjusting tap weights of feed-forward equalizers Grant 8,964,826 - Agrawal , et al. February 24, 2	2015-02-24
Analog signal current integrators with tunable peaking function Grant 8,964,825 - Beukema , et al. February 24, 2	2015-02-24
Edge selection techniques for correcting clock duty cycle Grant 8,941,415 - Bulzacchelli , et al. January 27, 2	2015-01-27
Feed-forward equalizer architectures Grant 8,913,655 - Agrawal , et al. December 16, 2	2014-12-16
Dual-loop voltage regulator architecture with high DC accuracy and fast response time Grant 8,841,893 - Bulzacchelli , et al. September 23, 2	2014-09-23
Ultra-compact PLL with wide tuning range and low noise Grant 8,779,865 - Ainspan , et al. July 15, 2	2014-07-15
Timing recovery method and apparatus for an input/output bus with link redundancy Grant 8,774,228 - Bulzacchelli , et al. July 8, 2	2014-07-08
Hybrid superconducting-magnetic memory cell and array Grant 8,755,220 - Bulzacchelli , et al. June 17, 2	2014-06-17
Feed-forward equalizer architectures Grant 8,755,428 - Agrawal , et al. June 17, 2	2014-06-17
Edge Selection Techniques For Correcting Clock Duty Cycle App 20140125382 - Bulzacchelli; John F. ; et al.	2014-05-08
Capacitive level-shifting circuits and methods for adding DC offsets to output of current-integrating amplifier Grant 8,704,583 - Bulzacchelli , et al. April 22, 2	2014-04-22
Edge selection techniques for correcting clock duty cycle Grant 8,686,764 - Bulzacchelli , et al. April 1, 2	2014-04-01
Calibration of multiple parallel data communications lines for high skew conditions Grant 8,681,839 - Bulzacchelli , et al. March 25, 2	2014-03-25
Restoring output common-mode of amplifier via capacitive coupling Grant 8,633,764 - Agrawal , et al. January 21, 2	2014-01-21
Sense amplifier-type latch circuits with static bias current for enhanced operating frequency Grant 8,624,632 - Bulzacchelli January 7, 2	2014-01-07
Feed-forward Equalizer Architectures App 20130336378 - Agrawal; Ankur ; et al.	2013-12-19
Hybrid Superconducting-magnetic Memory Cell And Array App 20130303379 - BULZACCHELLI; John F. ; et al.	2013-11-14
Edge Selection Techniques For Correcting Clock Duty Cycle App 20130300481 - Bulzacchelli; John F. ; et al.	2013-11-14
Circuits And Methods For Dfe With Reduced Area And Power Consumption App 20130287089 - BULZACCHELLI; JOHN F. ; et al.	2013-10-31
High-resolution phase interpolators Grant 8,564,352 - Agrawal , et al. October 22, 2	2013-10-22
Peaking amplifier with capacitively-coupled parallel input stages Grant 8,558,611 - Bulzacchelli , et al. October 15, 2	2013-10-15
High-resolution phase interpolators Grant 8,558,597 - Agrawal , et al. October 15, 2	2013-10-15
Sense Amplifier-type Latch Circuits With Static Bias Current For Enhanced Operating Frequency App 20130257483 - Bulzacchelli; John F.	2013-10-03
Hybrid superconducting-magnetic memory cell and array Grant 8,547,732 - Bulzacchelli , et al. October 1, 2	2013-10-01
Analog Signal Current Integrators With Tunable Peaking Function App 20130215954 - Beukema; Troy J. ; et al.	2013-08-22
Capacitive Level-shifting Circuits And Methods For Adding Dc Offsets To Output Of Current-integrating Amplifier App 20130214865 - Bulzacchelli; John F. ; et al.	2013-08-22
Time Domain Analog Multiplication Techniques For Adjusting Tap Weights Of Feed-forward Equalizers App 20130208782 - Agrawal; Ankur ; et al.	2013-08-15
High-resolution Phase Interpolators App 20130207707 - Agrawal; Ankur ; et al.	2013-08-15
Peaking Amplifier With Capacitively-coupled Parallel Input Stages App 20130207722 - Bulzacchelli; John F. ; et al.	2013-08-15
Feed-forward Equalizer Architectures App 20130208779 - Agrawal; Ankur ; et al.	2013-08-15
High-resolution Phase Interpolators App 20130207708 - Agrawal; Ankur ; et al.	2013-08-15
Edge Selection Techniques For Correcting Clock Duty Cycle App 20130207703 - Bulzacchelli; John F. ; et al.	2013-08-15
Edge Selection Techniques For Correcting Clock Duty Cycle App 20130207702 - Bulzacchelli; John F. ; et al.	2013-08-15
Circuits and methods for DFE with reduced area and power consumption Grant 8,477,833 - Bulzacchelli , et al. July 2, 2	2013-07-02
Restoring Output Common-mode Of Amplifier Via Capacitive Coupling App 20120313703 - Agrawal; Ankur ; et al.	2012-12-13
Timing Recovery Method And Apparatus For An Input/output Bus With Link Redundancy App 20120314721 - BULZACCHELLI; JOHN F. ; et al.	2012-12-13
Circuits And Methods For Dfe With Reduced Area And Power Consumption App 20120314757 - Bulzacchelli; John F. ; et al.	2012-12-13
Hybrid superconducting-magnetic memory cell and array Grant 8,208,288 - Bulzacchelli , et al. June 26, 2	2012-06-26
Dual-loop Voltage Regulator Architecture With High Dc Accuracy And Fast Response Time App 20120153910 - Bulzacchelli; John F. ; et al.	2012-06-21
Hybrid Fast-slow Passgate Control Methods For Voltage Regulators Employing High Speed Comparators App 20120153909 - Bucossi; William L. ; et al.	2012-06-21
Ultra-compact PLL with wide tuning range and low noise Grant 8,183,948 - Ainspan , et al. May 22, 2	2012-05-22
Ultra-compact Pll With Wide Tuning Range And Low Noise App 20120112842 - AINSPAN; HERSCHEL A. ; et al.	2012-05-10
Hybrid Superconducting-magnetic Memory Cell And Array App 20120108434 - BULZACCHELLI; JOHN F. ; et al.	2012-05-03
Calibration of Multiple Parallel Data Communications Lines for High Skew Conditions App 20120106687 - Bulzacchelli; John F. ; et al.	2012-05-03
Optimal dithering of a digitally controlled oscillator with clock dithering for gain and bandwidth control Grant 8,138,840 - Ainspan , et al. March 20, 2	2012-03-20
Sampled current-integrating decision feedback equalizer and method Grant 8,085,841 - Bulzacchelli , et al. December 27, 2	2011-12-27
Technique For Linearizing The Voltage-to-frequency Response Of A Vco App 20110309888 - BULZACCHELLI; John F. ; et al.	2011-12-22
Ultra-compact Pll With Wide Tuning Range And Low Noise App 20110063038 - Ainspan; Herschel A. ; et al.	2011-03-17
Time-to-digital based analog-to-digital converter architecture Grant 7,893,861 - Bulzacchelli , et al. February 22, 2	2011-02-22
Time-to-digital Based Analog-to-digital Converter Architecture App 20100328130 - Bulzacchelli; John F. ; et al.	2010-12-30
Decision feedback equalizer using soft decisions Grant 7,822,114 - Bulzacchelli , et al. October 26, 2	2010-10-26
Multi-tap decision feedback equalizer (DFE) architecture eliminating critical timing path for higher-speed operation Grant 7,792,187 - Bulzacchelli September 7, 2	2010-09-07
Circuits And Methods For Dfe With Reduced Area And Power Consumption App 20100202506 - Bulzacchelli; John F. ; et al.	2010-08-12
Optimal Dithering Of A Digitally Controlled Oscillator With Clock Dithering For Gain And Bandwidth Control App 20100188158 - Ainspan; Herschel A. ; et al.	2010-07-29
Decision feedback equalizer (DFE) architecture Grant 7,715,474 - Park , et al. May 11, 2	2010-05-11
Sampled Current-integrating Decision Feedback Equalizer And Method App 20090252215 - Bulzacchelli; John F. ; et al.	2009-10-08
Hybrid Superconducting-magnetic Memory Cell And Array App 20090244958 - BULZACCHELLI; JOHN F. ; et al.	2009-10-01
Multi-tap Decision Feedback Equalizer (dfe) Architecture Eliminating Critical Timing Path For Higher-speed Operation App 20090060021 - BULZACCHELLI; JOHN F.	2009-03-05
Decision Feedback Equalizer Using Soft Decisions App 20080310495 - Bulzacchelli; John F. ; et al.	2008-12-18
Decision Feedback Equalizer (dfe) Architecture App 20080187036 - PARK; MATTHEW J. ; et al.	2008-08-07