Buchholtz; Wolfgang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Buchholtz; Wolfgang.The latest application filed is for "meander resistor".

Company Profile

0.11.14

Buchholtz; Wolfgang - Radebeul DE
Buchholtz; Wolfgang - Pfullingen DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Meander Resistor App 20160141393 - Hoentschel; Jan ; et al.	2016-05-19
Meander Resistor App 20150333057 - Hoentschel; Jan ; et al.	2015-11-19
DRAM cell based on conductive nanochannel plate Grant 9,006,906 - Chumakov , et al. April 14, 2	2015-04-14
Dram Cell Based On Conductive Nanochannel Plate App 20140299929 - CHUMAKOV; Dmytro ; et al.	2014-10-09
DRAM cell based on conductive nanochannel plate Grant 8,785,271 - Chumakov , et al. July 22, 2	2014-07-22
Dram Cell Based On Conductive Nanochannel Plate App 20120193807 - Chumakov; Dmytro ; et al.	2012-08-02
Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Grant 8,039,335 - Beyer , et al. October 18, 2	2011-10-18
Semiconductor Device Comprising Nmos And Pmos Transistors With Embedded Si/ge Material For Creating Tensile And Compressive Strain App 20110104878 - Beyer; Sven ; et al.	2011-05-05
Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Grant 7,893,503 - Beyer , et al. February 22, 2	2011-02-22
Method And System For Material Characterization In Semiconductor Production Processes Based On Ftir With Variable Angle Of Incidence App 20100243903 - Fahr; Torsten ; et al.	2010-09-30
Semiconductor Device Comprising Nmos And Pmos Transistors With Embedded Si/ge Material For Creating Tensile And Compressive Strain App 20100187635 - BEYER; SVEN ; et al.	2010-07-29
Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain Grant 7,741,167 - Beyer , et al. June 22, 2	2010-06-22
Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor Grant 7,494,872 - Wieczorek , et al. February 24, 2	2009-02-24
Technique for forming interconnect structures with reduced electro and stress migration and/or resistivity Grant 7,375,031 - Preusse , et al. May 20, 2	2008-05-20
Semiconductor Device Comprising Nmos And Pmos Transistors With Embedded Si/ge Material For Creating Tensile And Compressive Strain App 20080099794 - Beyer; Sven ; et al.	2008-05-01
Technique for forming a substrate having crystalline semiconductor regions of different characteristics Grant 7,332,384 - Buchholtz , et al. February 19, 2	2008-02-19
Method of forming sidewall spacers Grant 7,316,975 - Lenski , et al. January 8, 2	2008-01-08
Technique for forming interconnect structures with reduced electro and stress migration and/or resistivity App 20060246721 - Preusse; Axel ; et al.	2006-11-02
Technique for forming interconnect structures with reduced electro and stress migration and/or resistivity App 20060223311 - Buchholtz; Wolfgang ; et al.	2006-10-05
Method of forming sidewall spacers App 20060115988 - Lenski; Markus ; et al.	2006-06-01
Semiconductor device including semiconductor regions having differently strained channel regions and a method of manufacturing the same App 20060094193 - Horstmann; Manfred ; et al.	2006-05-04
Technique for forming a substrate having crystalline semiconductor regions of different characteristics App 20060006389 - Buchholtz; Wolfgang ; et al.	2006-01-12
Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor App 20050023611 - Wieczorek, Karsten ; et al.	2005-02-03
Acceleration sensor Grant 5,627,317 - Offenberg , et al. May 6, 1	1997-05-06

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