Buchanan John K
USPTO Trademark & Patent Filings
Trademark applications and grants for Buchanan John K. Buchanan John K has 1 trademark applications. The latest application filed is for "B. NAKED"
| Patent Application | Date |
|---|---|
| Chip topography for MOS integrated circuitry microprocessor chip 3,987,418 - 05/519,147 Buchanan October 19, 1 | 1976-10-19 |
| Pre-conditioning circuits for MOS integrated circuits 3,976,892 - 05/548,122 Buchanan August 24, 1 | 1976-08-24 |
| MOS DC Voltage booster circuit 3,942,047 - 05/475,366 Buchanan March 2, 1 | 1976-03-02 |
| Pre-conditioning circuits for MOS integrated circuits 3,942,162 - 05/485,191 Buchanan March 2, 1 | 1976-03-02 |
| MOS data bus control circuitry 3,912,947 - 05/485,698 Buchanan October 14, 1 | 1975-10-14 |
Mark Image Registration | Serial | Trademark Application Date |
|---|---|
"B. NAKED" 75753356 |
B. NAKED 1999-07-19 |
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