Bu; Jiankang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bu; Jiankang.The latest application filed is for "high voltage vertical semiconductor device with multiple silicon pillars in a racetrack arrangement".

Company Profile

0.26.6

Bu; Jiankang - Temecula CA
Bu; Jiankang - Windham ME US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High voltage vertical semiconductor device with multiple pillars in a racetrack arrangement Grant 9,972,681 - Ankoudinov , et al. May 15, 2	2018-05-15
High Voltage Vertical Semiconductor Device with Multiple Silicon Pillars in a Racetrack Arrangement App 20180061947 - Ankoudinov; Alexei ; et al.	2018-03-01
Oscillation Free Fast-Recovery Diode App 20130277711 - Chang; Hsueh-Rong ; et al.	2013-10-24
Non-volatile memory cell with asymmetrical split gate and related system and method Grant 8,502,296 - Labonte , et al. August 6, 2	2013-08-06
High-performance CMOS-compatible non-volatile memory cell and related method Grant 8,274,824 - Bu September 25, 2	2012-09-25
System and method for providing low voltage high density multi-bit storage flash memory Grant 8,241,975 - Bu , et al. August 14, 2	2012-08-14
System and method for improving CMOS compatible non volatile memory retention reliability Grant 8,198,708 - Bu , et al. June 12, 2	2012-06-12
System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory Grant 8,114,738 - Bu , et al. February 14, 2	2012-02-14
Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits Grant 8,097,923 - Budri , et al. January 17, 2	2012-01-17
System And Method For Providing Low Voltage High Density Multi-bit Storage Flash Memory App 20110287596 - Bu; Jiankang ; et al.	2011-11-24
System And Method For Improving Cmos Compatible Non Volatile Memory Retention Reliability App 20110215419 - Bu; Jiankang ; et al.	2011-09-08
Method and system for scaling channel length Grant 8,013,400 - Chou , et al. September 6, 2	2011-09-06
System and method for providing low voltage high density multi-bit storage flash memory Grant 8,004,032 - Bu , et al. August 23, 2	2011-08-23
System and method for improving CMOS compatible non volatile memory retention reliability Grant 7,910,420 - Bu , et al. March 22, 2	2011-03-22
Photo-focus modulation method for forming transistor gates and related transistor devices Grant 7,855,146 - Chou , et al. December 21, 2	2010-12-21
System and method for providing process compliant layout optimization using optical proximity correction to improve CMOS compatible non volatile memory retention reliability Grant 7,838,203 - Bu , et al. November 23, 2	2010-11-23
Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits App 20100276740 - Budri; Thanas ; et al.	2010-11-04
System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory App 20100259996 - Bu; Jiankang ; et al.	2010-10-14
System and method for providing an EPROM with different gate oxide thicknesses Grant 7,804,714 - Bu , et al. September 28, 2	2010-09-28
Method for forming non-volatile memory cells and related apparatus and system Grant 7,790,491 - Chou , et al. September 7, 2	2010-09-07
Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits Grant 7,781,289 - Budri , et al. August 24, 2	2010-08-24
System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory Grant 7,777,271 - Bu , et al. August 17, 2	2010-08-17
Low power, CMOS compatible non-volatile memory cell and related method and memory array Grant 7,773,423 - Bu August 10, 2	2010-08-10
Non-volatile memory cell that inhibits over-erasure and related method and memory array Grant 7,646,638 - Bu January 12, 2	2010-01-12
System and method for providing drain avalanche hot carrier programming for non-volatile memory applications Grant 7,586,792 - Bu , et al. September 8, 2	2009-09-08
System and method for providing a low voltage low power EPROM based on gate oxide breakdown Grant 7,532,496 - Bu May 12, 2	2009-05-12
System and method for determining effective channel dimensions of metal oxide semiconductor devices Grant 7,514,940 - Bu April 7, 2	2009-04-07
System and method for determining substrate doping density in metal oxide semiconductor devices Grant 7,512,499 - Bu , et al. March 31, 2	2009-03-31
System and method for providing high endurance low cost CMOS compatible EEPROM devices Grant 7,483,310 - Bu January 27, 2	2009-01-27
System and method for enhancing erase performance in a CMOS compatible EEPROM device Grant 7,471,572 - Bu December 30, 2	2008-12-30
System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transistor Grant 7,447,064 - Bu , et al. November 4, 2	2008-11-04

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