Briones; Luis J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Briones; Luis J..The latest application filed is for "delay compensated continuous time sigma delta analog-to-digital converter".

Company Profile

0.11.9

Briones; Luis J. - Chandler AZ
Briones; Luis J. - US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Delay compensated continuous time sigma delta analog-to-digital converter Grant 8,847,804 - Braswell , et al. September 30, 2	2014-09-30
Delay Compensated Continuous Time Sigma Delta Analog-to-digital Converter App 20140125504 - Braswell; Brandt ; et al.	2014-05-08
Voltage regulation circuitry and related operating methods Grant 8,482,266 - Yu , et al. July 9, 2	2013-07-09
Voltage Regulation Circuitry And Related Operating Methods App 20120187927 - Yu; Chuanzhao ; et al.	2012-07-26
Initiation of high speed overlay mode for burst data and real time streaming (audio) applications Grant 7,990,937 - Chang , et al. August 2, 2	2011-08-02
Initiation of High Speed Overlay Mode for Burst Data and Real Time Streaming (Audio) Applications App 20090116472 - Chang; Kuor-Hsin ; et al.	2009-05-07
Linear half-rate clock and data recovery (CDR) circuit Grant 7,433,442 - Briones October 7, 2	2008-10-07
Current-mode direct conversion receiver Grant 7,415,260 - Stockstad , et al. August 19, 2	2008-08-19
Selective implementation of power management schemes based on detected computer operating environment Grant 7,055,047 - Wortel , et al. May 30, 2	2006-05-30
FSK modulator using IQ up-mixers and sinewave coded DACs Grant 7,043,222 - Wortel , et al. May 9, 2	2006-05-09
Linear half-rate clock and data recovery (CDR) circuit App 20060062339 - Briones; Luis J.	2006-03-23
Current-mode direct conversion receiver App 20050197090 - Stockstad, Troy L. ; et al.	2005-09-08
All digital PLL trimming circuit Grant 6,900,675 - Briones May 31, 2	2005-05-31
FSK modulator using IQ up-mixers and sinewave coded DACs App 20050048931 - Wortel, Klaas ; et al.	2005-03-03
All digital PLL trimming circuit App 20050046452 - Briones, Luis J.	2005-03-03
Phase detector for low power applications Grant 6,806,742 - Briones , et al. October 19, 2	2004-10-19
Selective implementation of power management schemes based on detected computer operating environment App 20040205361 - Wortel, Klaas ; et al.	2004-10-14
Enhanced register based FSK demodulator App 20040157571 - Wortel, Klaas ; et al.	2004-08-12
Step-down clock control and method for improving convergence for a digitally controlled self-calibrating VCO Grant 6,496,556 - Huehne , et al. December 17, 2	2002-12-17

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