| Patent | Date |
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Time domain voltage step down capacitor based circuit
Grant 8,369,115 - Buch , et al. February 5, 2 | 2013-02-05 |
Time Domain Voltage Step Down Capacitor Based Circuit
App 20100315848 - Buch; Fredrik ; et al. | 2010-12-16 |
Fast-sensing amplifier for flash memory
Grant 6,996,010 - Briner February 7, 2 | 2006-02-07 |
Memory unit having programmable device ID
Grant 6,944,064 - Feng , et al. September 13, 2 | 2005-09-13 |
Read-biasing and amplifying system
Grant 6,914,822 - Briner July 5, 2 | 2005-07-05 |
Memory Unit Having Programmable Device Id
App 20050135153 - Feng, Eugene ; et al. | 2005-06-23 |
Read-biasing and amplifying system
App 20040170078 - Briner, Michael S. | 2004-09-02 |
Feedback biasing integrated circuit
Grant 6,744,673 - Briner June 1, 2 | 2004-06-01 |
Bond out chip and method for making same
App 20030122264 - Lin, Fong-Long ; et al. | 2003-07-03 |
Fast-sensing amplifier for flash memory
App 20030112681 - Briner, Michael S. | 2003-06-19 |
Fast-sensing amplifier for flash memory
App 20030112683 - Briner, Michael S. | 2003-06-19 |
Reference Voltage Generator Using Flash Memory Cells
App 20010014035 - BRINER, MICHAEL S. | 2001-08-16 |
Power level detection circuit
Grant 6,229,352 - Chevallier , et al. May 8, 2 | 2001-05-08 |
Memory array having a reduced number of metal source lines
Grant 6,181,593 - Briner January 30, 2 | 2001-01-30 |
Non-volatile data storage unit and method of controlling same
Grant 6,141,247 - Roohparvar , et al. October 31, 2 | 2000-10-31 |
Level detection circuit
Grant 6,046,615 - Chevallier , et al. April 4, 2 | 2000-04-04 |
Switch for minimizing transistor exposure to high voltage
Grant 5,963,061 - Briner October 5, 1 | 1999-10-05 |
Op amp circuit with variable resistance and memory system including same
Grant 5,903,504 - Chevallier , et al. May 11, 1 | 1999-05-11 |
Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell
Grant 5,896,400 - Roohparvar , et al. April 20, 1 | 1999-04-20 |
Non-volatile data storage unit and method of controlling same
Grant 5,864,499 - Roohparvar , et al. January 26, 1 | 1999-01-26 |
Computer including a fast sensing amplifier
Grant 5,835,411 - Briner November 10, 1 | 1998-11-10 |
Memory system having programmable control parameters
Grant 5,801,985 - Roohparvar , et al. September 1, 1 | 1998-09-01 |
Level detection circuit and method
Grant 5,767,711 - Chevallier , et al. June 16, 1 | 1998-06-16 |
Method for sensing the binary state of a floating-gate memory device
Grant 5,757,697 - Briner May 26, 1 | 1998-05-26 |
Reference voltage generator using flash memory cells
Grant 5,721,702 - Briner February 24, 1 | 1998-02-24 |
Memory circuit with switch for selectively connecting an I/O pad directly to a nonvolatile memory cell and method for operating same
Grant 5,706,235 - Roohparvar , et al. January 6, 1 | 1998-01-06 |
OP amp circuit with variable resistance and memory system including same
Grant 5,694,366 - Chevallier , et al. December 2, 1 | 1997-12-02 |
Non-volatile data storage unit method of controlling same
Grant 5,682,345 - Roohparvar , et al. October 28, 1 | 1997-10-28 |
Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
Grant 5,677,879 - Roohparvar , et al. October 14, 1 | 1997-10-14 |
Memory array having a reduced number of metal source lines
Grant 5,631,864 - Briner May 20, 1 | 1997-05-20 |
Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell
Grant 5,594,694 - Roohparvar , et al. January 14, 1 | 1997-01-14 |
Power level detection circuit
Grant 5,581,206 - Chevallier , et al. December 3, 1 | 1996-12-03 |
Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
Grant 5,568,426 - Roohparvar , et al. October 22, 1 | 1996-10-22 |
Memories with burst mode access
Grant 5,559,990 - Cheng , et al. September 24, 1 | 1996-09-24 |
Apparatus and method for improving the endurance of floating gate devices
Grant 5,231,602 - Radjy , et al. July 27, 1 | 1993-07-27 |
Optimized electrically erasable PLA cell for minimum read disturb
Grant 5,005,155 - Radjy , et al. * April 2, 1 | 1991-04-02 |
Optimized E.sup.2 pal cell for minimum read disturb
Grant 4,935,648 - Radjy , et al. June 19, 1 | 1990-06-19 |
Temperature compensated complementary metal-insulator-semiconductor oscillator
Grant 4,714,901 - Jain , et al. December 22, 1 | 1987-12-22 |
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