BRIGHTON; Jeffrey E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for BRIGHTON; Jeffrey E..The latest application filed is for "mosfet with source side only stress".

Company Profile

0.17.7

BRIGHTON; Jeffrey E. - Dallas TX
Brighton; Jeffrey E. - Frisco TX
Brighton; Jeffrey E. - Katy TX
Brighton; Jeffrey E. - Houston TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Mosfet With Source Side Only Stress App 20150087127 - Nawaz; Samuel Zafar ; et al.	2015-03-26
MOSFET with source side only stress Grant 8,928,047 - Nawaz , et al. January 6, 2	2015-01-06
Post-Polymer Revealing of Through-Substrate Via Tips App 20140154880 - Brighton; Jeffrey E. ; et al.	2014-06-05
Post-polymer Revealing Of Through-substrate Via Tips App 20130062736 - BRIGHTON; JEFFREY E. ; et al.	2013-03-14
Warpage control features on the bottomside of TSV die lateral to protruding bottomside tips Grant 8,344,493 - West , et al. January 1, 2	2013-01-01
Warpage Control Features On The Bottomside Of Tsv Die Lateral To Protruding Bottomside Tips App 20120175774 - West; Jeffrey Alan ; et al.	2012-07-12
Mosfet With Source Side Only Stress App 20120146054 - Nawaz; Samuel Zafar ; et al.	2012-06-14
Method of manufacturing a bipolar junction transistor including undercutting regions adjacent to the emitter region to enlarge the emitter region Grant 6,713,361 - Nawaz , et al. March 30, 2	2004-03-30
Method for manufacturing a bipolar junction transistor App 20020039815 - Nawaz, Samuel Z. ; et al.	2002-04-04
Pillar alignment and formation process Grant 5,436,199 - Brighton July 25, 1	1995-07-25
Self-aligned tungsten-filled via Grant 5,212,352 - Brighton , et al. May 18, 1	1993-05-18
Methods for and products having self-aligned conductive pillars on interconnects Grant 5,132,775 - Brighton , et al. July 21, 1	1992-07-21
Product of pillar alignment and formation process Grant 5,025,303 - Brighton June 18, 1	1991-06-18
Method for planarization of a semiconductor device prior to metallization Grant 4,966,865 - Welch , et al. October 30, 1	1990-10-30
Self-aligned nonnested sloped via Grant 4,931,144 - Brighton June 5, 1	1990-06-05
Methods for forming self-aligned conductive pillars on interconnects Grant 4,866,008 - Brighton , et al. September 12, 1	1989-09-12
Self-aligned nonnested sloped via Grant 4,842,991 - Brighton June 27, 1	1989-06-27
Method of making single polysilicon self-aligned transistor Grant 4,839,305 - Brighton June 13, 1	1989-06-13
Bipolar transistor in isolation well with angled corners Grant 4,799,099 - Verret , et al. January 17, 1	1989-01-17
Method for planarization of a semiconductor device prior to metallization Grant 4,795,722 - Welch , et al. January 3, 1	1989-01-03
Self-aligned silicide in a polysilicon self-aligned bipolar transistor Grant 4,789,885 - Brighton , et al. December 6, 1	1988-12-06
Method for etching contact vias in a semiconductor device Grant 4,753,709 - Welch , et al. June 28, 1	1988-06-28

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