loadpatents
name:-0.0043468475341797
name:-0.025839805603027
name:-0.00048589706420898
Briggs; Willard S. Patent Filings

Briggs; Willard S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Briggs; Willard S..The latest application filed is for "system having cache memory and method of accessing".

Company Profile
0.20.1
  • Briggs; Willard S. - Boulder CO US
  • Briggs; Willard S. - Longmont CO
  • Briggs; Willard S. - Dallas TX
  • Briggs; Willard S. - Carrollton TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System and method for cache-based compressed display data storage
Grant 8,587,600 - Tischler , et al. November 19, 2
2013-11-19
Apparatus and method for providing higher radix redundant digit lookup tables for recoding and compressing function values
Grant 7,543,008 - Matula , et al. June 2, 2
2009-06-02
Arithmetic processor utilizing multi-table look up to obtain reciprocal operands
Grant 7,346,642 - Briggs , et al. March 18, 2
2008-03-18
Apparatus and method for updating a status register in an out of order execution pipeline based on most recently issued instruction information
Grant 7,243,216 - Oliver , et al. July 10, 2
2007-07-10
Floating point unit with variable speed execution pipeline and method of operation
Grant 7,243,217 - Oliver , et al. July 10, 2
2007-07-10
Method and apparatus for performing mathematical functions using polynomial approximation and a rectangular aspect ratio multiplier
Grant RE39,385 - Brightman , et al. November 7, 2
2006-11-07
System having cache memory and method of accessing
App 20060179231 - Briggs; Willard S. ;   et al.
2006-08-10
Floating point unit with try-again reservation station and method of operation
Grant 6,976,153 - Oliver , et al. December 13, 2
2005-12-13
Apparatus and method for providing higher radix redundant digit lookup tables for recoding and compressing function values
Grant 6,938,062 - Matula , et al. August 30, 2
2005-08-30
Data transfer with highly granular cacheability control between memory and a scratchpad area
Grant 6,598,136 - Norrod , et al. July 22, 2
2003-07-22
System and method for interleaved execution of multiple independent threads
Grant 6,594,755 - Nuechterlein , et al. July 15, 2
2003-07-15
Data transfer from a graphics subsystem to system memory
Grant 5,801,720 - Norrod , et al. September 1, 1
1998-09-01
Method and apparatus for performing prescaled division
Grant 5,475,630 - Briggs , et al. December 12, 1
1995-12-12
Method and apparatus for performing division using a rectangular aspect ratio multiplier
Grant 5,307,303 - Briggs , et al. April 26, 1
1994-04-26
Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier
Grant 5,159,566 - Briggs , et al. October 27, 1
1992-10-27
Signed digit multiplier
Grant 5,144,576 - Briggs , et al. September 1, 1
1992-09-01
Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier
Grant 5,060,182 - Briggs , et al. October 22, 1
1991-10-22
Address-controlled automatic bus arbitration and address modification
Grant 4,649,471 - Briggs , et al. March 10, 1
1987-03-10
Single-chip microcomputer with internal time-multiplexed address/data/interrupt bus
Grant 4,626,985 - Briggs December 2, 1
1986-12-02
Non-overlapping clock CMOS circuit with two threshold voltages
Grant 4,595,845 - Briggs June 17, 1
1986-06-17

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