Brebner; Gordon J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Brebner; Gordon J..The latest application filed is for "modular and scalable cyclic redundancy check computation circuit".

Company Profile

1.52.5

Brebner; Gordon J. - Monte Sereno CA
Brebner; Gordon J. - San Jose CA
Brebner; Gordon J. - Wrightington GB
Brebner; Gordon J. - Los Gatos CA
Brebner; Gordon J. - Campbell CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Mining proxy acceleration Grant 11,431,815 - Zhong , et al. August 30, 2	2022-08-30
Pipelined match-action circuitry Grant 11,425,036 - Herrera , et al. August 23, 2	2022-08-23
Programmable network measurement engine Grant 11,290,361 - Hu , et al. March 29, 2	2022-03-29
Streaming editor circuit for implementing a packet deparsing process Grant 10,834,241 - McBryan , et al. November 10, 2	2020-11-10
Efficient mapping of table pipelines for software-defined networking (SDN) data plane Grant 9,674,081 - Jiang , et al. June 6, 2	2017-06-06
Modular and scalable cyclic redundancy check computation circuit Grant 9,350,385 - Jiang , et al. May 24, 2	2016-05-24
Tuple construction from data packets Grant 9,270,517 - Attig , et al. February 23, 2	2016-02-23
High throughput finite state machine Grant 9,110,524 - Jiang , et al. August 18, 2	2015-08-18
Embedded memory and dedicated processor structure within an integrated circuit Grant 8,874,837 - Neely , et al. October 28, 2	2014-10-28
Modular And Scalable Cyclic Redundancy Check Computation Circuit App 20140281844 - Jiang; Weirong ; et al.	2014-09-18
Parallel processing of network packets Grant 8,780,914 - Brebner July 15, 2	2014-07-15
Parallel processing of network packets Grant 8,775,685 - Brebner July 8, 2	2014-07-08
Method and system for preparing modularized circuit designs for dynamic partial reconfiguration of programmable logic Grant 8,560,996 - Brebner , et al. October 15, 2	2013-10-15
Pipeline of a packet processor programmed to extract packet fields Grant 8,443,102 - Attig , et al. May 14, 2	2013-05-14
Embedded Memory And Dedicated Processor Structure Within An Integrated Circuit App 20130117504 - Neely; Christopher E. ; et al.	2013-05-09
Parallel Processing Of Network Packets App 20130094507 - Brebner; Gordon J.	2013-04-18
Pipeline of a packet processor programmed to concurrently perform operations Grant 8,385,340 - Attig , et al. February 26, 2	2013-02-26
Generating a pipeline of a packet processor from a parsing tree Grant 8,358,653 - Attig , et al. January 22, 2	2013-01-22
Managing formatting of packets of a communication protocol Grant 8,311,057 - Attig , et al. November 13, 2	2012-11-13
Flexible packet data storage for diverse packet processing applications Grant 8,266,583 - Brebner September 11, 2	2012-09-11
Transforming a declarative description of a packet processor Grant 8,160,092 - Attig , et al. April 17, 2	2012-04-17
Generation of a pipeline for processing a type of network packets Grant 8,144,702 - Attig , et al. March 27, 2	2012-03-27
Graphical user interface for system design Grant 8,121,826 - Neely , et al. February 21, 2	2012-02-21
Method for message processing on a programmable logic device Grant 8,065,130 - Brebner , et al. November 22, 2	2011-11-22
Configurable memory manager Grant 8,015,386 - Kulkarni , et al. September 6, 2	2011-09-06
Method and apparatus for providing an interface between a programmable circuit and a processor Grant 7,949,793 - James-Roxby , et al. May 24, 2	2011-05-24
Machines for inserting or removing fixed length data at a fixed location in a serial data stream Grant 7,949,790 - James-Roxby , et al. May 24, 2	2011-05-24
Methods of clustering actions for manipulating packets of a communication protocol Grant 7,949,007 - Attig , et al. May 24, 2	2011-05-24
Hierarchical interface for IC system Grant 7,852,117 - Lo , et al. December 14, 2	2010-12-14
Formatting fields of communication packets Grant 7,839,849 - Attig , et al. November 23, 2	2010-11-23
Processing variable size fields of the packets of a communication protocol Grant 7,822,066 - Blott , et al. October 26, 2	2010-10-26
Circuit for processing network packets Grant 7,817,657 - Attig , et al. October 19, 2	2010-10-19
Dataflow pipeline implementing actions for manipulating packets of a communication protocol Grant 7,804,844 - Attig , et al. September 28, 2	2010-09-28
Generation of a specification of a network packet processor Grant 7,784,014 - Brebner , et al. August 24, 2	2010-08-24
Method and apparatus for multithreading on a programmable logic device Grant 7,770,179 - James-Roxby , et al. August 3, 2	2010-08-03
Generation of a specification of a processor of network packets Grant 7,669,166 - Brebner , et al. February 23, 2	2010-02-23
Automatically generating multithreaded datapaths Grant 7,636,909 - Kulkarni , et al. December 22, 2	2009-12-22
Generation of a specification of a network packet processor Grant 7,636,908 - Brebner December 22, 2	2009-12-22
Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip Grant 7,574,680 - Kulkarni , et al. August 11, 2	2009-08-11
Method for message processing on a programmable logic device Grant 7,552,042 - Brebner , et al. June 23, 2	2009-06-23
Method and apparatus for memory management in an integrated circuit Grant 7,454,587 - Kulkarni , et al. November 18, 2	2008-11-18
Micro-coded processors for concurrent processing in a programmable logic device Grant 7,398,502 - Kulkarni , et al. July 8, 2	2008-07-08
Address lookup table Grant 7,379,451 - Brebner May 27, 2	2008-05-27
Memory apparatus for a message processing system and method of providing same Grant 7,281,093 - Kulkarni , et al. October 9, 2	2007-10-09
Method and apparatus for a programmable interface of a soft platform on a programmable logic device Grant 7,228,520 - Keller , et al. June 5, 2	2007-06-05
Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip Grant 7,185,309 - Kulkarni , et al. February 27, 2	2007-02-27
Gigabit router on a single programmable logic device Grant 6,891,397 - Brebner May 10, 2	2005-05-10
Method and apparatus for multithreading Grant 6,794,896 - Brebner September 21, 2	2004-09-21