Bowers; Benjamin J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bowers; Benjamin J..The latest application filed is for "compiler for closed-loop 1xn vlsi design".

Company Profile

0.20.18

Bowers; Benjamin J. - Cary NC
Bowers; Benjamin J. - Raleigh NC
Bowers; Benjamin J. - Starkville MS

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Compiler for closed-loop 1.times.N VLSI design Grant 9,558,308 - Bowers , et al. January 31, 2	2017-01-31
Compiler For Closed-loop 1xn Vlsi Design App 20150169792 - Bowers; Benjamin J. ; et al.	2015-06-18
Compiler for closed-loop 1xN VLSI design Grant 8,887,113 - Bowers , et al. November 11, 2	2014-11-11
Compiler for closed-loop 1.times.N VLSI design Grant 8,739,086 - Bowers , et al. May 27, 2	2014-05-27
Method For Pulse-latch Based Hold Fixing App 20130222029 - Bowers; Benjamin J. ; et al.	2013-08-29
Methods, systems, and media to improve manufacturability of semiconductor devices Grant 8,516,428 - Bowers , et al. August 20, 2	2013-08-20
Creating integrated circuit capacitance from gate array structures Grant 8,298,888 - Correale, Jr. , et al. October 30, 2	2012-10-30
Creating Integrated Circuit Capacitance From Gate Array Structures App 20120190165 - Correale, JR.; Anthony ; et al.	2012-07-26
Compiler for Closed-Loop 1xN VLSI Design App 20120192129 - Bowers; Benjamin J. ; et al.	2012-07-26
Compiler for Closed-Loop 1xN VLSI Design App 20120192128 - Bowers; Benjamin J. ; et al.	2012-07-26
Creating integrated circuit capacitance from gate array structures Grant 8,188,516 - Correale, Jr. , et al. May 29, 2	2012-05-29
Uniquification and parent-child constructs for 1xN VLSI design Grant 8,156,458 - Baker , et al. April 10, 2	2012-04-10
Integrated design for manufacturing for 1.times.N VLSI design Grant 8,141,016 - Correale, Jr. , et al. March 20, 2	2012-03-20
Hierarchy reassembler for 1.times.N VLSI design Grant 8,136,062 - Steinmetz , et al. March 13, 2	2012-03-13
Closed-loop 1.times.N VLSI design system Grant 8,132,134 - Correale, Jr. , et al. March 6, 2	2012-03-06
Compiler for closed-loop 1.times.N VLSI design Grant 8,122,399 - Bowers , et al. February 21, 2	2012-02-21
Top level hierarchy wiring via 1.times.N compiler Grant 7,966,598 - Polomik , et al. June 21, 2	2011-06-21
Systems and media to improve manufacturability of semiconductor devices Grant 7,908,571 - Bowers , et al. March 15, 2	2011-03-15
Creating Integrated Circuit Capacitance from Gate Array Structures App 20100155800 - Correale, JR.; Anthony ; et al.	2010-06-24
Creating integrated circuit capacitance from gate array structures Grant 7,728,362 - Correale, Jr. , et al. June 1, 2	2010-06-01
1xn Block Builder For 1xn Vlsi Design App 20100107130 - Bowers; Benjamin J. ; et al.	2010-04-29
Compiler for Closed-Loop 1xN VLSI Design App 20100058272 - Bowers; Benjamin J. ; et al.	2010-03-04
Uniquification and Parent-Child Constructs for 1xN VLSI Design App 20100058269 - Baker; Matthew W. ; et al.	2010-03-04
Closed-Loop 1xN VLSI Design System App 20100058271 - Correale, JR.; Anthony ; et al.	2010-03-04
Integrated Design for Manufacturing for 1xN VLSI Design App 20100058260 - Correale, Jr.; Anthony ; et al.	2010-03-04
Hierarchy Reassembler for 1xN VLSI Design App 20100058270 - Steinmetz; Paul M. ; et al.	2010-03-04
Top Level Hierarchy Wiring Via 1xN Compiler App 20100058275 - Polomik; Anthony L. ; et al.	2010-03-04
System for blocking multiple memory read port activation Grant 7,672,188 - Correale, Jr. , et al. March 2, 2	2010-03-02
System for Blocking Multiple Memory Read Port Activation App 20090154283 - Correale, JR.; Anthony ; et al.	2009-06-18
Methods, Systems, and Media to Improve Manufacturability of Semiconductor Devices App 20080127024 - Bowers; Benjamin J. ; et al.	2008-05-29
Systems And Media To Improve Manufacturability Of Semiconductor Devices App 20080115093 - Bowers; Benjamin J. ; et al.	2008-05-15
Methods, systems, and media to improve manufacturability of semiconductor devices Grant 7,343,570 - Bowers , et al. March 11, 2	2008-03-11
Methods and apparatuses for creating integrated circuit capacitance from gate array structures App 20070170553 - Correale; Anthony JR. ; et al.	2007-07-26
Methods, systems, and media to improve manufacturability of semiconductor devices App 20070101306 - Bowers; Benjamin J. ; et al.	2007-05-03
Push/pull multiplexer bit Grant 6,815,984 - Bowers , et al. November 9, 2	2004-11-09

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