loadpatents
name:-0.0066189765930176
name:-0.0090761184692383
name:-0.0006401538848877
Boulin; David M. Patent Filings

Boulin; David M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Boulin; David M..The latest application filed is for "packaged gallium nitride material transistors and methods associated with the same".

Company Profile
0.7.6
  • Boulin; David M. - Bethlehem PA US
  • Boulin; David M. - Lebanon NJ
  • Boulin; David M. - Franklin Township Warren County
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Packaged gallium nitride material transistors and methods associated with the same
Grant 8,358,005 - Kizilyalli , et al. January 22, 2
2013-01-22
Leadframe designs for plastic overmold packages
Grant 7,566,953 - Boulin , et al. July 28, 2
2009-07-28
Packaged Gallium Nitride Material Transistors And Methods Associated With The Same
App 20090109646 - Kizilyalli; Isik C. ;   et al.
2009-04-30
Leadframe designs for plastic overmold packages
App 20080173989 - Boulin; David M. ;   et al.
2008-07-24
Leadframe designs for plastic overmold packages
App 20060237826 - Boulin; David M. ;   et al.
2006-10-26
Leadframe designs for plastic overmold packages
App 20060055063 - Boulin; David M. ;   et al.
2006-03-16
Multi-layered semiconductor structure
Grant 6,977,128 - Boulin , et al. December 20, 2
2005-12-20
Multi-layered semiconductor structure
App 20040094847 - Boulin, David M. ;   et al.
2004-05-20
Method of forming an alignment feature in or on a multi-layered semiconductor structure
Grant 6,706,609 - Boulin , et al. March 16, 2
2004-03-16
Method of forming an alignment feature in or on a multilayered semiconductor structure
Grant 6,576,529 - Boulin , et al. June 10, 2
2003-06-10
Method of forming an alignment feature in or on a multi-layered semiconductor structure
App 20020004283 - Boulin, David M. ;   et al.
2002-01-10
Electrical measurement of level-to-level misalignment in integrated circuits
Grant 4,386,459 - Boulin June 7, 1
1983-06-07

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