Boschke; Roman

Patent Applications and Registrations

Patent applications and USPTO patent grants for Boschke; Roman.The latest application filed is for "finfet having locally higher fin-to-fin pitch".

Company Profile

3.50.42

Boschke; Roman - Leuven BE
Boschke; Roman - Dresdan DE
Boschke; Roman - Dresden DE
- Dresden DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
FinFET having locally higher fin-to-fin pitch Grant 11,114,435 - Hellings , et al. September 7, 2	2021-09-07
Finfet Having Locally Higher Fin-to-fin Pitch App 20170207217 - HELLINGS; Geert ; et al.	2017-07-20
Semiconductor device having a high-K gate dielectric above an STI region Grant 9,659,928 - Wei , et al. May 23, 2	2017-05-23
E-fuse design for high-K metal-gate technology Grant 9,515,155 - Boschke , et al. December 6, 2	2016-12-06
SOI transistor having drain and source regions of reduced length and a stressed dielectric material adjacent thereto Grant 9,450,073 - Wei , et al. September 20, 2	2016-09-20
Simplified gate-first HKMG manufacturing flow Grant 9,431,508 - Flachowsky , et al. August 30, 2	2016-08-30
Sandwich silicidation for fully silicided gate formation Grant 9,236,440 - Boschke , et al. January 12, 2	2016-01-12
Method for forming a strained transistor by stress memorization based on a stressed implantation mask Grant 9,117,929 - Wirbeleit , et al. August 25, 2	2015-08-25
Semiconductor Device Having High-k Gate Dielectric Above An Sti Region App 20150187765 - Wei; Andy ; et al.	2015-07-02
Novel E-fuse Design For High-k Metal-gate Technology App 20150179753 - Boschke; Roman ; et al.	2015-06-25
Transistor Device With Strained Layer App 20150179740 - Triyoso; Dina H. ; et al.	2015-06-25
Sandwich Silicidation For Fully Silicided Gate Formation App 20150162414 - Boschke; Roman ; et al.	2015-06-11
Method for self-aligned removal of a high-K gate dielectric above an STI region Grant 9,023,712 - Wei , et al. May 5, 2	2015-05-05
Transistor with embedded Si/Ge material having reduced offset and superior uniformity Grant 9,006,835 - Kronholz , et al. April 14, 2	2015-04-14
Simplified Gate-first Hkmg Manufacturing Flow App 20150097252 - Flachowsky; Stefan ; et al.	2015-04-09
Semiconductor device comprising a buried poly resistor Grant 8,962,420 - Kurz , et al. February 24, 2	2015-02-24
Reduction of defect rates in PFET transistors comprising a Si/Ge semiconductor material formed by epitaxial growth Grant 8,939,765 - Kronholz , et al. January 27, 2	2015-01-27
Silicidation of semiconductor devices Grant 8,846,467 - Boschke , et al. September 30, 2	2014-09-30
Transistor With Embedded Strain-inducing Material Formed In Cavities Formed In A Silicon/germanium Substrate App 20140246696 - Flachowsky; Stefan ; et al.	2014-09-04
Semiconductor device structure and methods for forming a CMOS integrated circuit structure Grant 8,735,241 - Flachowsky , et al. May 27, 2	2014-05-27
Transistor With Embedded Si/ge Material Having Reduced Offset And Superior Uniformity App 20140131805 - Kronholz; Stephan ; et al.	2014-05-15
Enhancing deposition uniformity of a channel semiconductor alloy by forming a recess prior to the well implantation Grant 8,722,486 - Kronholz , et al. May 13, 2	2014-05-13
Enhanced transistor performance of N-channel transistors by using an additional layer above a dual stress liner in a semiconductor device Grant 8,697,584 - Richter , et al. April 15, 2	2014-04-15
Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ doped semiconductor material Grant 8,664,049 - Kronholz , et al. March 4, 2	2014-03-04
Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss Grant 8,652,913 - Gehring , et al. February 18, 2	2014-02-18
SOI device with a buried insulating material having increased etch resistivity Grant 08617940 -	2013-12-31
SOI device with a buried insulating material having increased etch resistivity Grant 8,617,940 - Kurz , et al. December 31, 2	2013-12-31
Transistor with embedded Si/Ge material having reduced offset and superior uniformity Grant 8,609,498 - Kronholz , et al. December 17, 2	2013-12-17
Transistor with boot shaped source/drain regions Grant 8,497,180 - Javorka , et al. July 30, 2	2013-07-30
Leakage control in field effect transistors based on an implantation species introduced locally at the STI edge Grant 8,481,404 - Kammler , et al. July 9, 2	2013-07-09
Stress adjustment in stressed dielectric materials of semiconductor devices by stress relaxation based on radiation Grant 8,426,262 - Hoentschel , et al. April 23, 2	2013-04-23
Methods for fabricating semiconductor devices Grant 8,377,786 - Kronholz , et al. February 19, 2	2013-02-19
Method Of Forming A Semiconductor Device App 20130037866 - Thees; Hans-Jurgen ; et al.	2013-02-14
Temperature monitoring in a semiconductor device by thermocouples distributed in the contact structure Grant 8,373,244 - Mowry , et al. February 12, 2	2013-02-12
Transistor With Boot Shaped Source/drain Regions App 20130032864 - Javorka; Peter ; et al.	2013-02-07
Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by corner rounding at the top of the gate electrode Grant 8,338,892 - Kronholz , et al. December 25, 2	2012-12-25
Buried etch stop layer in trench isolation structures for superior surface planarity in densely packed semiconductor devices Grant 8,334,573 - Wiatr , et al. December 18, 2	2012-12-18
Semiconductor device comprising eFUSES of enhanced programming efficiency Grant 8,268,679 - Aubel , et al. September 18, 2	2012-09-18
Methods For Fabricating Semiconductor Devices App 20120202326 - KRONHOLZ; Stephan-Detlef ; et al.	2012-08-09
Reduction of Defect Rates in PFET Transistors Comprising a Silicon/Germanium Semiconductor Material by Providing a Graded Germanium Concentration App 20120161249 - Kronholz; Stephan-Detlef ; et al.	2012-06-28
Semiconductor device comprising a silicon/germanium resistor Grant 8,193,066 - Kurz , et al. June 5, 2	2012-06-05
SOI device having a substrate diode formed by reduced implantation energy Grant 8,097,519 - Wiatr , et al. January 17, 2	2012-01-17
Transistor With Embedded Si/Ge Material Having Reduced Offset and Superior Uniformity App 20120001254 - Kronholz; Stephan ; et al.	2012-01-05
Reduction of Defect Rates in PFET Transistors Comprising a Si/Ge Semiconductor Material Formed by Epitaxial Growth App 20110291163 - Kronholz; Stephan ; et al.	2011-12-01
Method for Forming a Strained Transistor by Stress Memorization Based on a Stressed Implantation Mask App 20110223733 - Wirbeleit; Frank ; et al.	2011-09-15
Enhancing Deposition Uniformity Of A Channel Semiconductor Alloy By Forming A Recess Prior To The Well Implantation App 20110156172 - Kronholz; Stephan ; et al.	2011-06-30
SILICON-BASED SEMICONDUCTOR DEVICE COMPRISING eFUSES FORMED BY AN EMBEDDED SEMICONDUCTOR ALLOY App 20110156857 - Kurz; Andreas ; et al.	2011-06-30
Method for forming a strained transistor by stress memorization based on a stressed implantation mask Grant 7,964,458 - Wirbeleit , et al. June 21, 2	2011-06-21
Strain Enhancement In Transistors Comprising An Embedded Strain-inducing Semiconductor Alloy By Corner Rounding At The Top Of The Gate Electrode App 20110101469 - Kronholz; Stephan ; et al.	2011-05-05
Increasing stress transfer efficiency in a transistor by reducing spacer width during the drain/source implantation sequence Grant 7,923,338 - Wiatr , et al. April 12, 2	2011-04-12
Buried Etch Stop Layer In Trench Isolation Structures For Superior Surface Planarity In Densely Packed Semiconductor Devices App 20110049637 - Wiatr; Maciej ; et al.	2011-03-03
Stress Adjustment In Stressed Dielectric Materials Of Semiconductor Devices By Stress Relaxation Based On Radiation App 20110049641 - Hoentschel; Jan ; et al.	2011-03-03
Leakage Control In Field Effect Transistors Based On An Implantation Species Introduced Locally At The Sti Edge App 20110024846 - Kammler; Thorsten ; et al.	2011-02-03
Blocking pre-amorphization of a gate electrode of a transistor Grant 7,879,667 - Mowry , et al. February 1, 2	2011-02-01
Semiconductor Element Formed In A Crystalline Substrate Material And Comprising An Embedded In Situ N-doped Semiconductor Material App 20100327358 - Kronholz; Stephan ; et al.	2010-12-30
Semiconductor Element Formed In A Crystalline Substrate Material And Comprising An Embedded In Situ Doped Semiconductor Material App 20100289114 - KRONHOLZ; Stephan ; et al.	2010-11-18
Transistor with embedded silicon/germanium material on a strained semiconductor on insulator substrate Grant 7,763,515 - Wei , et al. July 27, 2	2010-07-27
Soi Device With A Buried Insulating Material Having Increased Etch Resistivity App 20100163994 - Kurz; Andreas ; et al.	2010-07-01
SEMICONDUCTOR DEVICE COMPRISING eFUSES OF ENHANCED PROGRAMMING EFFICIENCY App 20100107403 - Aubel; Oliver ; et al.	2010-05-06
High-k Etch Stop Layer Of Reduced Thickness For Patterning A Dielectric Material During Fabrication Of Transistors App 20100090321 - Mulfinger; Robert ; et al.	2010-04-15
Semiconductor Device Comprising A Buried Poly Resistor App 20100078645 - Kurz; Andreas ; et al.	2010-04-01
Semiconductor Device Comprising A Silicon/germanium Resistor App 20100025772 - Kurz; Andreas ; et al.	2010-02-04
Increasing Stress Transfer Efficiency In A Transistor By Reducing Spacer Width During The Drain/source Implantation Sequence App 20090246927 - Wiatr; Maciej ; et al.	2009-10-01
Formation of transistor having a strained channel region including a performance enhancing material composition utilizing a mask pattern Grant 7,569,437 - Wirbeleit , et al. August 4, 2	2009-08-04
Temperature Monitoring In A Semiconductor Device By Thermocouples Distributed In The Contact Structure App 20090166794 - Mowry; Anthony ; et al.	2009-07-02
Soi Device Having A Substrate Diode Formed By Reduced Implantation Energy App 20090111223 - Wiatr; Maciej ; et al.	2009-04-30
Method For Self-aligned Removal Of A High-k Gate Dielectric Above An Sti Region App 20090057813 - Wei; Andy ; et al.	2009-03-05
Blocking Pre-amorphization Of A Gate Electrode Of A Transistor App 20090001371 - Mowry; Anthony ; et al.	2009-01-01
Transistor Having Reduced Gate Resistance And Enhanced Stress Transfer Efficiency And Method Of Forming The Same App 20090001479 - Wiatr; Maciej ; et al.	2009-01-01
Enhanced Transistor Performance Of N-channel Transistors By Using An Additional Layer Above A Dual Stress Liner In A Semiconductor Device App 20080296693 - Richter; Ralf ; et al.	2008-12-04
Soi Transistor Having Drain And Source Regions Of Reduced Length And A Stressed Dielectric Material Adjacent Thereto App 20080237712 - Wei; Andy ; et al.	2008-10-02
Transistor With Embedded Silicon/germanium Material On A Strained Semiconductor On Insulator Substrate App 20080179628 - Wei; Andy ; et al.	2008-07-31
Method For Forming Silicon/germanium Containing Drain/source Regions In Transistors With Reduced Silicon/germanium Loss App 20080182371 - Gehring; Andreas ; et al.	2008-07-31
Transistor Having A Strained Channel Region Including A Performance Enhancing Material Composition App 20080023692 - Wirbeleit; Frank ; et al.	2008-01-31
Method For Forming A Strained Transistor By Stress Memorization Based On A Stressed Implantation Mask App 20080026572 - Wirbeleit; Frank ; et al.	2008-01-31