Borkenhagen; John Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Borkenhagen; John Michael.The latest application filed is for "multi-server system interconnect".

Company Profile

0.51.45

Borkenhagen; John Michael - Rochester MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multi-server system interconnect Grant 9,984,023 - Borkenhagen , et al. May 29, 2	2018-05-29
Multi-server System Interconnect App 20170046291 - Borkenhagen; John Michael ; et al.	2017-02-16
Apparatus for and method for real-time optimization of virtual machine input/output performance Grant 8,151,265 - Ben-Yehuda , et al. April 3, 2	2012-04-03
Digital data architecture employing redundant links in a daisy chain of component modules Grant 8,108,647 - Bartley , et al. January 31, 2	2012-01-31
High capacity memory subsystem architecture storing interleaved data for reduced bus speed Grant 8,019,949 - Bartley , et al. September 13, 2	2011-09-13
Dual-mode memory chip for high capacity memory subsystem Grant 7,921,264 - Bartley , et al. April 5, 2	2011-04-05
Hub for supporting high capacity memory subsystem Grant 7,921,271 - Bartley , et al. April 5, 2	2011-04-05
Method and apparatus for implementing redundant memory access using multiple controllers on the same bank of memory Grant 7,882,479 - Bartley , et al. February 1, 2	2011-02-01
Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes Grant 7,873,773 - Bartley , et al. January 18, 2	2011-01-18
Capacity on demand using signaling bus control Grant 7,865,757 - Borkenhagen , et al. January 4, 2	2011-01-04
Computer system having an apportionable data bus and daisy chained memory chips Grant 7,844,769 - Bartley , et al. November 30, 2	2010-11-30
Memory chip for high capacity memory subsystem supporting replication of command data Grant 7,822,936 - Bartley , et al. October 26, 2	2010-10-26
High capacity memory subsystem architecture employing hierarchical tree configuration of memory modules Grant 7,818,512 - Bartley , et al. October 19, 2	2010-10-19
Memory chip for high capacity memory subsystem supporting multiple speed bus Grant 7,809,913 - Bartley , et al. October 5, 2	2010-10-05
Diagnostic interface architecture for memory device Grant 7,802,158 - Borkenhagen , et al. September 21, 2	2010-09-21
Handling DMA operations during a page copy Grant 7,783,793 - Bartley , et al. August 24, 2	2010-08-24
Digital Data Architecture Employing Redundant Links in a Daisy Chain of Component Modules App 20100191894 - Bartley; Gerald Keith ; et al.	2010-07-29
Handling DMA requests in a virtual memory environment Grant 7,725,620 - Bartley , et al. May 25, 2	2010-05-25
Implementing redundant memory access using multiple controllers on the same bank of memory Grant 7,725,762 - Bartley , et al. May 25, 2	2010-05-25
Implementing directory organization to selectively optimize performance or reliability Grant 7,707,463 - Bartley , et al. April 27, 2	2010-04-27
Dynamic reconfiguration of solid state memory device to replicate and time multiplex data over multiple data interfaces Grant 7,675,949 - Bartley , et al. March 9, 2	2010-03-09
Implementing Cache Coherency and Reduced Latency Using Multiple Controllers for Memory System App 20090300291 - Bartley; Gerald Keith ; et al.	2009-12-03
Implementing Redundant Memory Access Using Multiple Controllers for Memory System App 20090300411 - Bartley; Gerald Keith ; et al.	2009-12-03
Memory chip having an apportionable data bus Grant 7,620,763 - Bartley , et al. November 17, 2	2009-11-17
Patrol snooping for higher level cache eviction candidate identification Grant 7,577,793 - Borkenhagen , et al. August 18, 2	2009-08-18
Diagnostic Interface Architecture For Memory Device App 20090183039 - Borkenhagen; John Michael ; et al.	2009-07-16
Apparatus for and Method for Real-Time Optimization of virtual Machine Input/Output Performance App 20090164990 - Ben-Yehuda; Shmuel ; et al.	2009-06-25
Self timed memory chip having an apportionable data bus Grant 7,546,410 - Bartley , et al. June 9, 2	2009-06-09
Memory controller and method for handling DMA operations during a page copy Grant 7,533,198 - Bartley , et al. May 12, 2	2009-05-12
Diagnostic interface architecture for memory device Grant 7,526,692 - Borkenhagen , et al. April 28, 2	2009-04-28
Dynamic Reconfiguration Of Solid State Memory Device To Replicate And Time Multiplex Data Over Multiple Data Interfaces App 20090073739 - Bartley; Gerald Keith ; et al.	2009-03-19
Memory system having an apportionable data bus and daisy chained memory chips Grant 7,490,186 - Bartley , et al. February 10, 2	2009-02-10
Hub for Supporting High Capacity Memory Subsystem App 20090006705 - Bartley; Gerald Keith ; et al.	2009-01-01
High Capacity Memory Subsystem Architecture Employing Hierarchical Tree Configuration of Memory Modules App 20090006752 - Bartley; Gerald Keith ; et al.	2009-01-01
High Capacity Memory Subsystem Architecture Employing Multiple-Speed Bus App 20090006774 - Bartley; Gerald Keith ; et al.	2009-01-01
Dual-Mode Memory Chip for High Capacity Memory Subsystem App 20090006775 - Bartley; Gerald Keith ; et al.	2009-01-01
High Capacity Memory Subsystem Architecture Storing Interleaved Data for Reduced Bus Speed App 20090006790 - Bartley; Gerald Keith ; et al.	2009-01-01
Memory Chip for High Capacity Memory Subsystem Supporting Replication of Command Data App 20090006772 - Bartley; Gerald Keith ; et al.	2009-01-01
Memory Chip for High Capacity Memory Subsystem Supporting Multiple Speed Bus App 20090006715 - Bartley; Gerald Keith ; et al.	2009-01-01
Dynamic reconfiguration of solid state memory device to replicate and time multiplex data over multiple data interfaces Grant 7,468,993 - Bartley , et al. December 23, 2	2008-12-23
Method and apparatus to purge remote node cache lines to support hot node replace in a computing system Grant 7,467,260 - Averill , et al. December 16, 2	2008-12-16
Method and Apparatus for Implementing Redundant Memory Access Using Multiple Controllers on the Same Bank of Memory App 20080307253 - Bartley; Gerald Keith ; et al.	2008-12-11
Method and Apparatus for Implementing Redundant Memory Access Using Multiple Controllers on the Same Bank of Memory App 20080307252 - Bartley; Gerald Keith ; et al.	2008-12-11
Handling Dma Requests In A Virtual Memory Environment App 20080244112 - Bartley; Gerald Keith ; et al.	2008-10-02
Handling Dma Operations During A Page Copy App 20080201495 - Bartley; Gerald Keith ; et al.	2008-08-21
Capacity on demand using signaling bus control Grant 7,392,418 - Borkenhagen , et al. June 24, 2	2008-06-24
Autonomic bus reconfiguration for fault conditions Grant 7,392,445 - Borkenhagen , et al. June 24, 2	2008-06-24
Capacity on Demand Using Signaling Bus Control App 20080114913 - Borkenhagen; John Michael ; et al.	2008-05-15
Multi-channel memory architecture for daisy chained arrangements of nodes with bridging between memory channels Grant 7,334,070 - Borkenhagen February 19, 2	2008-02-19
Memory Chip Having an Apportionable Data Bus App 20080040529 - Bartley; Gerald Keith ; et al.	2008-02-14
Memory System Having an Apportionable Data Bus and Daisy Chained Memory Chips App 20080028126 - Bartley; Gerald Keith ; et al.	2008-01-31
Computer System Having an Apportionable Data Bus App 20080028125 - Bartley; Gerald Keith ; et al.	2008-01-31
Self Timed Memory Chip Having an Apportionable Data Bus App 20080028175 - Bartley; Gerald Keith ; et al.	2008-01-31
Method and stacked memory structure for implementing enhanced cooling of memory devices Grant 7,309,911 - Bartley , et al. December 18, 2	2007-12-18
Multi-node Architecture With Daisy Chain Communication Link Configurable To Operate In Unidirectional And Bidirectional Modes App 20070189313 - Bartley; Gerald Keith ; et al.	2007-08-16
Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes Grant 7,254,663 - Bartley , et al. August 7, 2	2007-08-07
Method and apparatus for implementing directory organization to selectively optimize performance or reliability App 20070168762 - Bartley; Gerald Keith ; et al.	2007-07-19
Patrol snooping for higher level cache eviction candidate identification App 20070168617 - Borkenhagen; John Michael ; et al.	2007-07-19
Memory controller and method for handling DMA operations during a page copy App 20070083682 - Bartley; Gerald Keith ; et al.	2007-04-12
Apparatus and method for handling DMA requests in a virtual memory environment App 20070083681 - Bartley; Gerald Keith ; et al.	2007-04-12
Method and stacked memory structure for implementing enhanced cooling of memory devices App 20060268519 - Bartley; Gerald Keith ; et al.	2006-11-30
Dynamic allocation of shared cache directory for optimizing performance Grant 7,089,361 - Borkenhagen August 8, 2	2006-08-08
Dynamic reconfiguration of solid state memory device to replicate and time multiplex data over multiple data interfaces App 20060158917 - Bartley; Gerald Keith ; et al.	2006-07-20
Capacity on demand using signaling bus control App 20060136680 - Borkenhagen; John Michael ; et al.	2006-06-22
Multi-channel memory architecture for daisy chained arrangements of nodes with bridging between memory channels App 20060095592 - Borkenhagen; John Michael	2006-05-04
Method and apparatus to purge remote node cache lines to support hot node replace in a computing system App 20060080509 - Averill; Duane Arlyn ; et al.	2006-04-13
Diagnostic interface architecture for memory device App 20060075282 - Borkenhagen; John Michael ; et al.	2006-04-06
Configurable directory allocation Grant 7,013,375 - Borkenhagen , et al. March 14, 2	2006-03-14
Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes App 20060020740 - Bartley; Gerald Keith ; et al.	2006-01-26
Dynamic optimization of latency and bandwidth on DRAM interfaces Grant 6,963,516 - Blackmon , et al. November 8, 2	2005-11-08
Data strobe gating for source synchronous communications interface Grant 6,940,760 - Borkenhagen , et al. September 6, 2	2005-09-06
Autonomic bus reconfiguration for fault conditions App 20050058086 - Borkenhagen, John Michael ; et al.	2005-03-17
Dynamic allocation of shared cach directory for optimizing performanc App 20050033919 - Borkenhagen, John Michael	2005-02-10
Shared cache line update mechanism Grant 6,839,816 - Borkenhagen , et al. January 4, 2	2005-01-04
Independent sequencers in a DRAM control structure Grant 6,836,831 - Borkenhagen , et al. December 28, 2	2004-12-28
Configurable directory allocation App 20040193810 - Borkenhagen, John Michael ; et al.	2004-09-30
Programmable compensated delay for DDR SDRAM interface using programmable delay loop for reference calibration Grant 6,760,856 - Borkenhagen , et al. July 6, 2	2004-07-06
SDRAM address error detection method and apparatus Grant 6,754,858 - Borkenhagen , et al. June 22, 2	2004-06-22
Dynamic optimization of latency and bandwidth on DRAM interfaces App 20040103258 - Blackmon, Herman Lee ; et al.	2004-05-27
Data strobe gating for source synchronous communications interface App 20040071015 - Borkenhagen, John Michael ; et al.	2004-04-15
Method and apparatus for selecting thread switch events in a multithreaded processor Grant 6,697,935 - Borkenhagen , et al. February 24, 2	2004-02-24
Independent sequencers in a DRAM control structure App 20040030849 - Borkenhagen, John Michael ; et al.	2004-02-12
Data strobe gating for source synchronous communications interface Grant 6,671,211 - Borkenhagen , et al. December 30, 2	2003-12-30
Shared cache line update mechanism App 20030163642 - Borkenhagen, John Michael ; et al.	2003-08-28
Dynamically producing an effective impedance of an output driver with a bounded variation during transitions thereby reducing jitter Grant 6,600,347 - Borkenhagen , et al. July 29, 2	2003-07-29
Thread switch control in a multithreaded processor system Grant 6,567,839 - Borkenhagen , et al. May 20, 2	2003-05-20
Dynamically Producing An Effective Impedance Of An Output Driver With A Bounded Variation During Transitions Thereby Reducing Jitter App 20030067327 - Borkenhagen, John Michael ; et al.	2003-04-10
Data strobe gating for source synchronous communications interface App 20020149967 - Borkenhagen, John Michael ; et al.	2002-10-17
SDRAM address error detection method and apparatus App 20020144210 - Borkenhagen, John Michael ; et al.	2002-10-03
Method and apparatus for implementing high speed DDR SDRAM read interface with reduced ACLV effects Grant 6,442,102 - Borkenhagen , et al. August 27, 2	2002-08-27
Accessing data from a multiple entry fully associative cache buffer in a multithread data processing system Grant 6,263,404 - Borkenhagen , et al. July 17, 2	2001-07-17
Altering thread priorities in a multithreaded processor Grant 6,212,544 - Borkenhagen , et al. April 3, 2	2001-04-03
Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor Grant 6,105,051 - Borkenhagen , et al. August 15, 2	2000-08-15
Method and apparatus to force a thread switch in a multithreaded processor Grant 6,076,157 - Borkenhagen , et al. June 13, 2	2000-06-13
Method and apparatus for communicating translation command information in a multithreaded environment Grant 6,044,447 - Averill , et al. March 28, 2	2000-03-28
System for modifying microprocessor operations independently of the execution unit upon detection of preselected opcodes Grant 5,790,843 - Borkenhagen , et al. August 4, 1	1998-08-04

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