Borer; Terry P.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Borer; Terry P..The latest application filed is for "method and apparatus for designing systems using logic regions".
- Borer; Terry P. - Toronto CA
| Patent | Date |
|---|---|
| Method and apparatus for designing systems using logic regions Grant 7,197,734 - Singh , et al. March 27, 2 | 2007-03-27 |
| Method and apparatus for implementing soft constraints in tools used for designing systems on programmable logic devices Grant 7,194,720 - Borer , et al. March 20, 2 | 2007-03-20 |
| Method and apparatus for placement of components onto programmable logic devices Grant 7,181,717 - Singh , et al. February 20, 2 | 2007-02-20 |
| Method and apparatus for placement of components onto programmable logic devices Grant 6,779,169 - Singh , et al. August 17, 2 | 2004-08-17 |
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