loadpatents
name:-0.01957893371582
name:-0.009958028793335
name:-0.0037031173706055
Borel; Stephan Patent Filings

Borel; Stephan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Borel; Stephan.The latest application filed is for "electronic system in package comprising protected side faces".

Company Profile
3.14.14
  • Borel; Stephan - Crolles FR
  • BOREL; Stephan - Grenoble Cedex 09 FR
  • Borel; Stephan - St. Martin d'Heres N/A FR
  • Borel; Stephan - Saint Martin d'Heres FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Electronic chip with protected rear face
Grant 11,355,456 - Borel , et al. June 7, 2
2022-06-07
Electronic System In Package Comprising Protected Side Faces
App 20220115330 - SOHIER; Thibaut ;   et al.
2022-04-14
Chip Or System-in-package Protection Using The Gmi Effect
App 20210398918 - SOHIER; Thibaut ;   et al.
2021-12-23
Electronic Chip, The Rear Face Of Which Is Protected By An Improved Embrittlement Structure
App 20210050310 - BOREL; Stephan ;   et al.
2021-02-18
Electronic circuit comprising electrically insulating trenches
Grant 10,593,588 - Goutaudier , et al.
2020-03-17
Electronic Chip With Protected Rear Face
App 20190229073 - BOREL; Stephan ;   et al.
2019-07-25
Electronic Circuit Comprising Electrically Insulating Trenches
App 20180366365 - Goutaudier; Fabienne ;   et al.
2018-12-20
Making interconnections by curving conducting elements under a microelectronic device such as a chip
Grant 9,999,138 - Borel June 12, 2
2018-06-12
Electronic chip comprising multiple layers for protecting a rear face
Grant 9,741,670 - Charbonnier , et al. August 22, 2
2017-08-22
Making Interconnections By Curving Conducting Elements Under A Microelectronic Device Such As A Chip
App 20170150615 - BOREL; Stephan
2017-05-25
Electronic Chip Comprising A Protected Rear Face
App 20160307855 - CHARBONNIER; Jean ;   et al.
2016-10-20
Method for fabricating a fixed structure defining a volume receiving a movable element in particular of a MEMS
Grant 8,685,777 - Dieppedale , et al. April 1, 2
2014-04-01
Method for etching a sacrificial layer for a micro-machined structure
Grant 8,541,313 - Borel , et al. September 24, 2
2013-09-24
Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels
Grant 8,367,487 - Ernst , et al. February 5, 2
2013-02-05
Method For Fabricating A Fixed Structure Defining A Volume Receiving A Movable Element In Particular Of A Mems
App 20120021550 - DIEPPEDALE; CHRISTEL ;   et al.
2012-01-26
Structure And Method For Fabricating A Microelectronic Device Provided With One Or More Quantum Wires Able To Form One Or More Transistor Channels
App 20110124161 - ERNST; Thomas ;   et al.
2011-05-26
Structure and method for realizing a microelectronic device provided with a number of quantum wires capable of forming one or more transistor channels
Grant 7,910,917 - Ernst , et al. March 22, 2
2011-03-22
Field-effect microelectronic device, capable of forming one or several transistor channels
Grant 7,902,575 - Ernst , et al. March 8, 2
2011-03-08
Field-effect Microelectronic Device, Capable Of Forming One Or Several Transistor Channels
App 20090194826 - ERNST; Thomas ;   et al.
2009-08-06
Method For Etching A Sacrificial Layer For A Micro-machined Structure
App 20090124088 - Borel; Stephan ;   et al.
2009-05-14
Field-effect microelectronic device, capable of forming one or several transistor channels
Grant 7,518,195 - Ernst , et al. April 14, 2
2009-04-14
Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor
Grant 7,436,005 - Monfray , et al. October 14, 2
2008-10-14
Structure and Method For Realizing a Microelectronic Device Provided With a Number of Quantum Wires Capable of Forming One or More Transistor Channels
App 20080149919 - Ernst; Thomas ;   et al.
2008-06-26
Field-effect microelectronic device, capable of forming one or several transistor channels
App 20070126035 - Ernst; Thomas ;   et al.
2007-06-07
Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor
App 20060081876 - Monfray; Stephane ;   et al.
2006-04-20

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