Boppana; Vamsi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Boppana; Vamsi.The latest application filed is for "method of ic design optimization via creation of design-specific cells from post-layout patterns".

Company Profile

0.7.6

Boppana; Vamsi - San Jose CA
Boppana; Vamsi - Santa Clara CA
Boppana, Vamsi - Sant Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of IC design optimization via creation of design-specific cells from post-layout patterns Grant 7,941,776 - Majumder , et al. May 10, 2	2011-05-10
Method of IC design optimization via creation of design-specific cells from post-layout patterns App 20080127000 - Majumder; Purnabha ; et al.	2008-05-29
Method for automated design of integrated circuits with targeted quality objectives using dynamically generated building blocks Grant 7,225,423 - Bhattacharya , et al. May 29, 2	2007-05-29
Process for automated generation of design-specific complex functional blocks to improve quality of synthesized digital integrated circuits in CMOS using altering process Grant 7,003,738 - Bhattacharya , et al. February 21, 2	2006-02-21
System and method for automated accurate pre-layout estimation of standard cell characteristics App 20050229142 - Boppana, Vamsi ; et al.	2005-10-13
Logic circuit having a functionally redundant transistor network Grant 6,938,223 - Boppana , et al. August 30, 2	2005-08-30
Context-sensitive constraint driven uniquification and characterization of standard cells Grant 6,782,514 - Bhattacharya , et al. August 24, 2	2004-08-24
Context-sensitive constraint driven uniquification and characterization of standard cells App 20030140319 - Bhattacharya, Debashis ; et al.	2003-07-24
Multiple error and fault diagnosis based on Xlists Grant 6,532,440 - Boppana , et al. March 11, 2	2003-03-11
Digital logic circuits used to design integrated circuits App 20020162078 - Boppana, Vamsi ; et al.	2002-10-31
Verification of sequential circuits with same state encoding Grant 6,408,424 - Mukherjee , et al. June 18, 2	2002-06-18
Method for automated design of integrated circuits with targeted quality objectives using dynamically generated building blocks App 20020069396 - Bhattacharya, Debashis ; et al.	2002-06-06
Process for automated generation of design-specific complex functional blocks to improve quality of synthesized digital integrated circuits in CMOS App 20020053063 - Bhattacharya, Debashis ; et al.	2002-05-02

Company Registrations

SEC

0001771897

Boppana Vamsi

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