Boles; Timothy Edward
Patent Applications and Registrations
Patent applications and USPTO patent grants for Boles; Timothy Edward.The latest application filed is for "vertical etch heterolithic integrated circuit devices".
- Boles; Timothy Edward - Tyngsboro MA
| Patent | Date |
|---|---|
| Vertical Etch Heterolithic Integrated Circuit Devices App 20220262959 - Boles; Timothy Edward ; et al. | 2022-08-18 |
| Unibody Lateral Via App 20220165645 - Rozbicki; Andrzej ; et al. | 2022-05-26 |
| Vertical etch heterolithic integrated circuit devices Grant 11,342,469 - Boles , et al. May 24, 2 | 2022-05-24 |
| Unibody lateral via Grant 11,270,928 - Rozbicki , et al. March 8, 2 | 2022-03-08 |
| Gate Metal Formation On Gallium Nitride Or Aluminum Gallium Nitride App 20210407810 - Struble; Wayne Mack ; et al. | 2021-12-30 |
| Pin Diodes With Multi-thickness Intrinsic Regions App 20210399143 - Boles; Timothy Edward ; et al. | 2021-12-23 |
| Diodes With Straight Segment Anodes App 20210367084 - Boles; Timothy Edward ; et al. | 2021-11-25 |
| Monolithic Multi-i Region Diode Limiters App 20210343706 - Brogle; James Joseph ; et al. | 2021-11-04 |
| Unibody Lateral Via App 20210313250 - Rozbicki; Andrzej ; et al. | 2021-10-07 |
| Monolithic multi-I region diode limiters Grant 11,127,737 - Brogle , et al. September 21, 2 | 2021-09-21 |
| Monolithic Multi-i Region Diode Switches App 20200279844 - Brogle; James Joseph ; et al. | 2020-09-03 |
| Monolithic Multi-i Region Diode Limiters App 20200258883 - A1 | 2020-08-13 |
| Vertical Etch Heterolithic Integrated Circuit Devices App 20200013906 - Boles; Timothy Edward ; et al. | 2020-01-09 |
| Method of making heterojunction P-I-N diode Grant 7,049,181 - Hoag , et al. May 23, 2 | 2006-05-23 |
| Hermetic electric component package Grant 7,026,223 - Goodrich , et al. April 11, 2 | 2006-04-11 |
| Surface-mount chip-scale package App 20050269695 - Brogle, James Joseph ; et al. | 2005-12-08 |
| High voltage semiconductor device Grant 6,946,717 - Hoag , et al. September 20, 2 | 2005-09-20 |
| Method of making heterojunction P-I-N diode App 20050006729 - Hoag, David Russell ; et al. | 2005-01-13 |
| Heterojunction P-I-N diode and method of making the same Grant 6,794,734 - Hoag , et al. September 21, 2 | 2004-09-21 |
| High voltage semiconductor device App 20040113231 - Hoag, David Russell ; et al. | 2004-06-17 |
| Heterojunction P-i-n Diode And Method Of Making The Same App 20030205715 - Hoag, David Russell ; et al. | 2003-11-06 |
| Hermetic electric component package App 20030183920 - Goodrich, Joel Lee ; et al. | 2003-10-02 |
| Method of fabricating heterolithic microwave integrated circuits Grant 6,150,197 - Boles , et al. November 21, 2 | 2000-11-21 |
| Heterolithic microwave integrated circuits Grant 6,114,716 - Boles , et al. September 5, 2 | 2000-09-05 |
| Method of fabricating polysilicon based resistors in Si-Ge heterojunction devices Grant 6,040,225 - Boles March 21, 2 | 2000-03-21 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 