Bobok; Gabor

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bobok; Gabor.The latest application filed is for "method and apparatus for testing".

Company Profile

0.17.16

Bobok; Gabor - Haifa IL
Bobok; Gabor - NewYork NY
Bobok; Gabor - Niskayuna NY
Bobok; Gabor - Schenectady NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for testing Grant 9,286,426 - Bobok , et al. March 15, 2	2016-03-15
Method And Apparatus For Testing App 20150310154 - Bobok; Gabor ; et al.	2015-10-29
Synthesizing VHDL multiple wait FSMS into RT level FSMS by preprocessing Grant 8,713,494 - Bobok , et al. April 29, 2	2014-04-29
Synthesizing Vhdl Multiple Wait Fsms Into Rt Level Fsms By Preprocessing App 20130275930 - Bobok; Gabor ; et al.	2013-10-17
Synthesizing VHDL multiple wait behavioral FSMs into RT level FSMs by preprocessing Grant 8,495,533 - Drasny , et al. July 23, 2	2013-07-23
Logic design verification techniques for liveness checking with retiming Grant 8,407,641 - Baumgartner , et al. March 26, 2	2013-03-26
Logic design verification techniques for liveness checking with retiming Grant 8,255,848 - Baumgartner , et al. August 28, 2	2012-08-28
Logic Design Verification Techniques For Liveness Checking With Retiming App 20120192133 - Baumgartner; Jason R. ; et al.	2012-07-26
Compiler option consistency checking during incremental hardware design language compilation Grant 8,230,406 - Carbone , et al. July 24, 2	2012-07-24
Selective compilation of a simulation model in view of unavailable higher level signals Grant 8,160,857 - Bobok , et al. April 17, 2	2012-04-17
Phase events in a simulation model of a digital system Grant 8,108,199 - Bobok , et al. January 31, 2	2012-01-31
Print events in the simulation of a digital system Grant 7,912,694 - Bobok , et al. March 22, 2	2011-03-22
Unrolling hardware design generate statements in a source window debugger Grant 7,823,097 - Drasny , et al. October 26, 2	2010-10-26
Logic Design Verification Techniques for Liveness Checking With Retiming App 20100223584 - Baumgartner; Jason R. ; et al.	2010-09-02
Selective Compilation Of A Simulation Model In View Of Unavailable Higher Level Signals App 20100153083 - Bobok; Gabor ; et al.	2010-06-17
Signals for simulation result viewing Grant 7,711,537 - Bobok , et al. May 4, 2	2010-05-04
Program product supporting specification of signals for simulation result viewing Grant 7,617,085 - Bobok , et al. November 10, 2	2009-11-10
Method, system and program product for selectively removing instrumentation logic from a simulation model Grant 7,552,043 - Bobok , et al. June 23, 2	2009-06-23
Method, system, and program product for pre-compile processing of hardware design language (HDL) source files Grant 7,506,287 - Drasny , et al. March 17, 2	2009-03-17
Method, system and program product supporting phase events in a simulation model of a digital system Grant 7,493,248 - Bobok , et al. February 17, 2	2009-02-17
Program Product Supporting Phase Events In A Simulation Model Of A Digital System App 20080294413 - BOBOK; GABOR ; et al.	2008-11-27
Program Product Supporting Specification Of Signals For Simulation Result Viewing App 20080229193 - BOBOK; GABOR ; et al.	2008-09-18
Method, System And Program Product For Selectively Removing Instrumentation Logic From A Simulation Model App 20080195368 - BOBOK; GABOR ; et al.	2008-08-14
Method, System And Program Product Supporting Print Events In The Simulation Of A Digital System App 20080183458 - Bobok; Gabor ; et al.	2008-07-31
Synthesizing VHDL multiple wait behavioral FSMs into RT level FSMs by preprocessing App 20080127126 - Drasny; Gabor ; et al.	2008-05-29
Compiler Option Consistency Checking During Incremental Hardware Design Language Compilation App 20080127130 - Carbone; Richard L.H. ; et al.	2008-05-29
Method, system, and program product for pre-compile processing of HDL source files App 20080072187 - Drasny; Gabor ; et al.	2008-03-20
Unrolling Hardware Design Generate Statements in a Source Window Debugger App 20080072206 - Drasny; Gabor ; et al.	2008-03-20
Method, System And Program Product Supporting Phase Events In A Simulation Model Of A Digital System App 20070260441 - Bobok; Gabor ; et al.	2007-11-08
Method, System And Program Product Supporting Specification Of Signals For Simulation Result Viewing App 20070260443 - Bobok; Gabor ; et al.	2007-11-08
Method, system and program product for selectively removing instrumentation logic from a simulation model App 20070061121 - Bobok; Gabor ; et al.	2007-03-15

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