loadpatents
Patent applications and USPTO patent grants for Block; Stefan G..The latest application filed is for "transistor cell for integrated circuits and method to form same".
Patent | Date |
---|---|
Transistor cell for integrated circuits and method to form same Grant 11,329,129 - Block , et al. May 10, 2 | 2022-05-10 |
Transistor Cell For Integrated Circuits And Method To Form Same App 20210159313 - Block; Stefan G. ;   et al. | 2021-05-27 |
Multi-read Port Memory App 20140281284 - Block; Stefan G. ;   et al. | 2014-09-18 |
Delay-Cell Footprint-Compatible Buffers App 20110320997 - Labib; Farid ;   et al. | 2011-12-29 |
Test pin gating for dynamic optimization Grant 8,078,926 - Block , et al. December 13, 2 | 2011-12-13 |
Adjustable hold flip flop and method for adjusting hold requirements Grant 7,944,237 - Habel , et al. May 17, 2 | 2011-05-17 |
Adjustable Hold Flip Flop And Method For Adjusting Hold Requirements App 20110084726 - Habel; Stephan ;   et al. | 2011-04-14 |
Write Through Speed Up for Memory Circuit App 20110063926 - Block; Stefan G. ;   et al. | 2011-03-17 |
Test Pin Gating for Dynamic Optimization App 20110066905 - Block; Stefan G. ;   et al. | 2011-03-17 |
Adjustable hold flip flop and method for adjusting hold requirements Grant 7,880,498 - Habel , et al. February 1, 2 | 2011-02-01 |
N cell height decoupling circuit Grant 7,829,973 - Schultz , et al. November 9, 2 | 2010-11-09 |
Power saving flip-flop Grant 7,650,548 - Block , et al. January 19, 2 | 2010-01-19 |
Adjustable Hold Flip Flop And Method For Adjusting Hold Requirements App 20090134912 - Habel; Stephan ;   et al. | 2009-05-28 |
Method and apparatus for adjusting on-chip delay with power supply control Grant 7,514,974 - Block , et al. April 7, 2 | 2009-04-07 |
N Cell Height Decoupling Circuit App 20090051006 - Schultz; Richard T. ;   et al. | 2009-02-26 |
Method And Apparatus For Adjusting On-chip Delay With Power Supply Control App 20080258700 - Block; Stefan G. ;   et al. | 2008-10-23 |
Power Saving Flip-flop App 20080250283 - Block; Stefan G. ;   et al. | 2008-10-09 |
Digital multi-phase clock generator Grant 7,088,158 - Block , et al. August 8, 2 | 2006-08-08 |
Logic built-in self test (BIST) Grant 6,904,554 - Block , et al. June 7, 2 | 2005-06-07 |
Digitally-programmable delay line for multi-phase clock generator Grant 6,756,832 - Reuveni , et al. June 29, 2 | 2004-06-29 |
Digitally-programmable delay line for multi-phase clock generator App 20040075481 - Reuveni, David R. ;   et al. | 2004-04-22 |
Logic built-in self-test (BIST) App 20040003330 - Block, Stefan G. ;   et al. | 2004-01-01 |
Matching calibration for digital-to-analog converters Grant 6,667,703 - Reuveni , et al. December 23, 2 | 2003-12-23 |
Digital multi-phase clock generator App 20030215039 - Block, Stefan G. ;   et al. | 2003-11-20 |
Matching calibration for dual analog-to-digital converters Grant 6,567,022 - Reuveni , et al. May 20, 2 | 2003-05-20 |
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