Blish, II; Richard C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Blish, II; Richard C..The latest application filed is for "counterflow microchannel cooler for integrated circuits".

Company Profile

0.22.1

Blish, II; Richard C. - Saratoga CA US
Blish, II; Richard C. - Scottsdale AZ
Blish, II; Richard C. - Los Gatos CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Thermal interface material and semiconductor component including the thermal interface material Grant 8,384,210 - Blish, II , et al. February 26, 2	2013-02-26
Methods and systems for recovering data in a nonvolatile memory array Grant 7,561,465 - Hancock , et al. July 14, 2	2009-07-14
Counterflow Microchannel Cooler For Integrated Circuits App 20080298017 - Blish, II; Richard C.	2008-12-04
Counterflow microchannel cooler for integrated circuits Grant 7,460,369 - Blish, II December 2, 2	2008-12-02
Integrated circuit package and method Grant 7,253,504 - Zhai , et al. August 7, 2	2007-08-07
Prevention of counterfeit markings on semiconductor devices Grant 7,157,131 - Blish, II , et al. January 2, 2	2007-01-02
Structure for minimizing hot spots in SOI device Grant 6,844,573 - Blish, II January 18, 2	2005-01-18
Neutron detecting device Grant 6,841,841 - Blish, II , et al. January 11, 2	2005-01-11
Apparatus for suppressing packaged semiconductor chip curvature while minimizing thermal impedance and maximizing speed/reliability Grant 6,803,653 - Likins , et al. October 12, 2	2004-10-12
Method and system for removing conductive lines during deprocessing Grant 6,768,198 - Blish, II , et al. July 27, 2	2004-07-27
Prevention of parametic or functional changes to silicon semiconductor device properties during x-ray inspection Grant 6,751,294 - Blish II , et al. June 15, 2	2004-06-15
High pressure water stream to separate a multi-layer integrated circuit device and package Grant 6,119,325 - Black , et al. September 19, 2	2000-09-19
Signal carrying means including a carrier substrate and wire bonds for carrying signals between the cache and logic circuitry of a microprocessor Grant 6,049,465 - Blish, II , et al. April 11, 2	2000-04-11
Electrophoretic coating methodology to improve internal package delamination and wire bond reliability Grant 6,046,507 - Hatchard , et al. April 4, 2	2000-04-04
Method of making flip chip packages Grant 6,043,429 - Blish, II , et al. March 28, 2	2000-03-28
Via configuration with decreased pitch and/or increased routing space Grant 6,037,547 - Blish, II March 14, 2	2000-03-14
Distributed voltage converter apparatus and method for high power microprocessor with array connections Grant 5,914,873 - Blish, II June 22, 1	1999-06-22
Apparatus and method to improve electromigration performance by use of amorphous barrier layer Grant 5,882,738 - Blish, II , et al. March 16, 1	1999-03-16
Quad flat package heat slug composition Grant 5,489,801 - Blish, II February 6, 1	1996-02-06
Quad flat package heat slug composition Grant 5,397,746 - Blish, II March 14, 1	1995-03-14
Integrated circuit package for surface mount technology Grant 4,870,224 - Smith , et al. September 26, 1	1989-09-26
Selective plasma vapor etching process Grant 4,213,818 - Lemons , et al. July 22, 1	1980-07-22

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.