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Chroma motion vector processing apparatus, system, and method
Grant 9,313,491 - Chiu , et al. April 12, 2 | 2016-04-12 |
Hardware accelerated compressed video bitstream escape code handling
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Hardware Accelerated Compressed Video Bitstream Escape Code Handling
App 20140098888 - Jahanghir; Musa ; et al. | 2014-04-10 |
Flexible macroblock ordering and arbitrary slice ordering apparatus, system, and method
Grant 8,644,392 - Chiu , et al. February 4, 2 | 2014-02-04 |
Hardware accelerated compressed video bitstream escape code handling
Grant 8,630,354 - Jahanghir , et al. January 14, 2 | 2014-01-14 |
Chroma Motion Vector Processing Apparatus, System, And Method
App 20130202041 - Chiu; Yi-jen ; et al. | 2013-08-08 |
Chroma motion vector processing apparatus, system, and method
Grant 8,379,723 - Chiu , et al. February 19, 2 | 2013-02-19 |
Flexible Macroblock Ordering And Arbitrary Slice Ordering Apparatus, System, And Method
App 20120134418 - Chiu; Yi-Jen ; et al. | 2012-05-31 |
Flexible macroblock ordering and arbitrary slice ordering apparatus, system, and method
Grant 8,126,046 - Chiu , et al. February 28, 2 | 2012-02-28 |
Flexible macroblock ordering and arbitrary slice ordering apparatus, system, and method
App 20080056347 - Chiu; Yi-Jen ; et al. | 2008-03-06 |
Chroma motion vector processing apparatus, system, and method
App 20070297511 - Chiu; Yi-Jen ; et al. | 2007-12-27 |
Hardware accelerated compressed video bitstream escape code handling
App 20070291851 - Jahanghir; Musa ; et al. | 2007-12-20 |
Modeling a mixed-language mixed-signal design
Grant 7,260,792 - Chetput , et al. August 21, 2 | 2007-08-21 |
Connecting verilog-AMS and VHDL-AMS components in a mixed-language mixed-signal design
Grant 7,251,795 - Biswas , et al. July 31, 2 | 2007-07-31 |
Floating point unit pipeline synchronized with processor pipeline
Grant 7,162,616 - Biswas , et al. January 9, 2 | 2007-01-09 |
Modeling a mixed-language mixed-signal design
App 20060259879 - Chetput; Chandrashekar L. ; et al. | 2006-11-16 |
Connecting verilog-AMS and VHDL-AMS components in a mixed-language mixed-signal design
App 20060074626 - Biswas; Prasenjit ; et al. | 2006-04-06 |
Processor architecture for executing two different fixed-length instruction sets
App 20050262329 - Krishnan, Sivaram ; et al. | 2005-11-24 |
Floating point unit pipeline synchronized with processor pipeline
App 20040172522 - Biswas, Prasenjit ; et al. | 2004-09-02 |
Floating point unit pipeline synchronized with processor pipeline
Grant 6,772,327 - Biswas , et al. August 3, 2 | 2004-08-03 |
Floating point unit pipeline synchronized with processor pipeline
App 20020174323 - Biswas, Prasenjit ; et al. | 2002-11-21 |
Floating point unit pipeline synchronized with processor pipeline
Grant 5,860,000 - Biswas , et al. January 12, 1 | 1999-01-12 |
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