Bishop; James Wilson

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bishop; James Wilson.The latest application filed is for "region-weighted accounting of multi-threaded processor core according to dispatch state".

Company Profile

0.15.10

Bishop; James Wilson - Newark Valley NY
Bishop; James Wilson - Leander TX US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Region-weighted accounting of multi-threaded processor core according to dispatch state Grant 9,110,708 - Bishop , et al. August 18, 2	2015-08-18
Region-weighted accounting of multi-threaded processor core according to dispatch state Grant 9,015,449 - Bishop , et al. April 21, 2	2015-04-21
Region-Weighted Accounting of Multi-Threaded Processor Core According to Dispatch State App 20140053164 - Bishop; James Wilson ; et al.	2014-02-20
Processor including age tracking of issue queue instructions Grant 8,489,863 - Bishop , et al. July 16, 2	2013-07-16
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors Grant 8,418,180 - Bishop , et al. April 9, 2	2013-04-09
Processor including age tracking of issue queue instructions Grant 8,380,964 - Bishop , et al. February 19, 2	2013-02-19
Processor Including Age Tracking of Issue Queue Instructions App 20120260069 - Bishop; James Wilson ; et al.	2012-10-11
Region-Weighted Accounting of Multi-Threaded Processor Core According to Dispatch State App 20120246447 - Bishop; James Wilson ; et al.	2012-09-27
Selecting fixed-point instructions to issue on load-store unit Grant 8,108,655 - Abernathy , et al. January 31, 2	2012-01-31
Information handling system including a processor with a bifurcated issue queue Grant 8,103,852 - Bishop , et al. January 24, 2	2012-01-24
Processor Including Age Tracking Of Issue Queue Instructions App 20110185159 - Bishop; James Wilson ; et al.	2011-07-28
Selecting Fixed-Point Instructions to Issue on Load-Store Unit App 20100250901 - Abernathy; Christopher Michael ; et al.	2010-09-30
Information Handling System Including A Processor With A Bifurcated Issue Queue App 20100161942 - Bishop; James Wilson ; et al.	2010-06-24
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors Grant 7,631,308 - Bishop , et al. December 8, 2	2009-12-08
Methods to randomly or pseudo-randomly, without bias, select instruction for performance analysis in a microprocessor Grant 7,620,801 - Bishop , et al. November 17, 2	2009-11-17
Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor Grant 7,478,276 - Bishop , et al. January 13, 2	2009-01-13
Thread Priority Method for Ensuring Processing Fairness in Simultaneous Multi-Threading Microprocessors App 20080294884 - Bishop; James Wilson ; et al.	2008-11-27
Method and apparatus for dynamic modification of microprocessor instruction group at dispatch Grant 7,254,697 - Bishop , et al. August 7, 2	2007-08-07
Methods to randomly or pseudo-randomly, without bias, select instruction for performance analysis in a microprocessor App 20060184776 - Bishop; James Wilson ; et al.	2006-08-17
Thread priority method, apparatus, and computer program product for ensuring processing fairness in simultaneous multi-threading microprocessors App 20060184946 - Bishop; James Wilson ; et al.	2006-08-17
Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor App 20060179346 - Bishop; James Wilson ; et al.	2006-08-10

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