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Register-based Complex Number Processing
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Apparatus For Forwarding A Mediated Request To Processing Circuitry In Response To A Configuration Request
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Message Passing In A Data Processing System
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Vector SIMD VLIW data path architecture
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Cache Stashing In A Data Processing System
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Vector SIMD VLIW Data Path Architecture
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Dual register data path architecture with registers in a data file divided into groups and sub-groups
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Method and system for decoding low density parity check codes
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Local memories with permutation functionality for digital signal processors
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Dual Register Data Path Architecture
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Method and System for Decoding Low Density Parity Check Codes
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Low Density Parity Check Code Row Update Instruction
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Method And Apparatus For Improving Trellis Decoding
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Method And Apparatus For Coding Relating To A Forward Loop
App 20100002793 - Dent; Peter R. ; et al. | 2010-01-07 |
Local Memories with Permutation Functionality for Digital Signal Processors
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Sign Operation Instructions and Circuitry
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Dymanic Interpolation Location
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Wireless communication system operating in response in part to time signals from the global position satellite system
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Wireless communication system with processor requested RAKE finger tasks
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Wireless communication system operating in response in part to time signals from the global position satellite system
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Wireless communication system with processor requested RAKE finger tasks
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